Patent classifications
G06F1/0342
Apparatus and method including scalable representations of arbitrary quantum computing rotations
Apparatus and method for performing a quantum rotation operation. For example, one embodiment of an apparatus comprises: a decoder to decode a plurality of instructions; execution circuitry to execute a first instruction or first set of the instructions to generate a floating point (FP) value and to store the FP value in a first register; the execution circuitry to execute a second instruction or second set of the one or more of the instructions to read the FP value from the first register and compress the FP value to generate a compressed FP value having a precision selected for performing quantum rotation operations; and quantum interface circuitry to process the compressed FP value to cause a quantum rotation to be performed on one or more qubits of a quantum processor.
Phase coherent numerically controlled oscillator
A phase coherent NCO circuit includes a base frequency NCO, a phase seeding circuit, a scaled frequency NCO, a sine/cosine generator. The base frequency NCO is configured to generate base phase values based on a base frequency control word. The phase seeding circuit is coupled to the base frequency NCO. The phase seeding circuit is configured to generate a seed phase value based on the base phase values and a scale factor value. The scaled frequency NCO is coupled to the phase seeding circuit. The scaled frequency NCO is configured to generate oscillator phase values based on the phase seed value and an oscillator frequency control word. The sine/cosine generator is coupled to the scaled frequency NCO. The sine/cosine generator is configured to generate oscillator output samples based on the oscillator phase values.
APPARATUS AND METHOD INCLUDING SCALABLE REPRESENTATIONS OF ARBITRARY QUANTUM COMPUTING ROTATIONS
Apparatus and method for performing a quantum rotation operation. For example, one embodiment of an apparatus comprises: a decoder to decode a plurality of instructions; execution circuitry to execute a first instruction or first set of the instructions to generate a floating point (FP) value and to store the FP value in a first register; the execution circuitry to execute a second instruction or second set of the one or more of the instructions to read the FP value from the first register and compress the FP value to generate a compressed FP value having a precision selected for performing quantum rotation operations; and quantum interface circuitry to process the compressed FP value to cause a quantum rotation to be performed on one or more qubits of a quantum processor.
PHASE COHERENT NUMERICALLY CONTROLLED OSCILLATOR
A phase coherent NCO circuit includes a base frequency NCO, a phase seeding circuit, a scaled frequency NCO, a sine/cosine generator. The base frequency NCO is configured to generate base phase values based on a base frequency control word. The phase seeding circuit is coupled to the base frequency NCO. The phase seeding circuit is configured to generate a seed phase value based on the base phase values and a scale factor value. The scaled frequency NCO is coupled to the phase seeding circuit. The scaled frequency NCO is configured to generate oscillator phase values based on the phase seed value and an oscillator frequency control word. The sine/cosine generator is coupled to the scaled frequency NCO. The sine/cosine generator is configured to generate oscillator output samples based on the oscillator phase values.
Phase coherent and frequency hopping numerically controlled oscillator
A device includes a plurality of phase accumulators, a multiplexer, and an oscillator. The plurality of phase accumulators is configured to receive a plurality of frequencies and generate a plurality of ramp signals. The multiplexer is configured to receive the plurality of ramp signals from the plurality of phase accumulators and to select one ramp signal from the plurality of ramp signals. The oscillator is configured to receive the one selected ramp signal and to generate one amplitude signal associated therewith. The plurality of phase accumulators continues generating their respective ramp signal. The multiplexer subsequent to selecting the one ramp signal is configured to select another ramp signal associated with another one phase accumulator of the plurality of phase accumulators. The oscillator is further configured to receive the selected another ramp signal and to generate another amplitude signal associated therewith.
Arbitrary waveform sequencer device and method
An arbitrary waveform sequencer device for playing a list of at least a first and a second arbitrary waveform file in a sequence is provided. The arbitrary waveform sequencer device comprises a list increment condition control unit configured to control an increment from the first to the second arbitrary waveform file as a function of an increment condition, and a transition control unit configured to control a timing of the increment.
Phase coherent numerically controlled oscillator
A phase coherent NCO circuit includes a base frequency NCO, a phase seeding circuit, a scaled frequency NCO, a sine/cosine generator. The base frequency NCO is configured to generate base phase values based on a base frequency control word. The phase seeding circuit is coupled to the base frequency NCO. The phase seeding circuit is configured to generate a seed phase value based on the base phase values and a scale factor value. The scaled frequency NCO is coupled to the phase seeding circuit. The scaled frequency NCO is configured to generate oscillator phase values based on the phase seed value and an oscillator frequency control word. The sine/cosine generator is coupled to the scaled frequency NCO. The sine/cosine generator is configured to generate oscillator output samples based on the oscillator phase values.
PHASE COHERENT NUMERICALLY CONTROLLED OSCILLATOR
A phase coherent NCO circuit includes a base frequency NCO, a phase seeding circuit, a scaled frequency NCO, a sine/cosine generator. The base frequency NCO is configured to generate base phase values based on a base frequency control word. The phase seeding circuit is coupled to the base frequency NCO. The phase seeding circuit is configured to generate a seed phase value based on the base phase values and a scale factor value. The scaled frequency NCO is coupled to the phase seeding circuit. The scaled frequency NCO is configured to generate oscillator phase values based on the phase seed value and an oscillator frequency control word. The sine/cosine generator is coupled to the scaled frequency NCO. The sine/cosine generator is configured to generate oscillator output samples based on the oscillator phase values.
ARBITRARY WAVEFORM SEQUENCER DEVICE AND METHOD
An arbitrary waveform sequencer device for playing a list of at least a first and a second arbitrary waveform file in a sequence is provided. The arbitrary waveform sequencer device comprises a list increment condition control unit configured to control an increment from the first to the second arbitrary waveform file as a function of an increment condition, and a transition control unit configured to control a timing of the increment.
Signal generator and signal generation method
The present application provides a signal generator, comprising a control circuit configured to receive input information, and generate variable control word information based on the received input information; a base time unit generation circuit configured to generate a base time unit; and a signal generation circuit configured to receive the variable control word information from the control circuit and receive the base time unit from the base time unit generation circuit, and generate a target signal having a variable frequency based on the received variable control word information and the received base time unit.