Patent classifications
G06F11/0721
Feasibility analysis for automatic programmatic generation of a lookup table and automatic programmatic generation of the lookup table that conforms with an error tolerance
Exemplary embodiments may perform feasibility analysis to determine whether it is possible to generate a lookup table that conforms to an error tolerance given a specification of a function or a set of data points that the lookup table attempts to approximate, an indication of breakpoint positions, and a specification of a data type for table values. Where it is determined that it is feasible to generate the lookup table, the lookup table may be automatically programmatically generated. Suggestions of how to modify the breakpoint positions and/or error tolerance may be provided. In addition, a visualization of approximation error and error tolerance, such as a visualization showing a feasibility margin, may be output. New data points may be processed to update table values for an already generated lookup table.
Systems and methods for margin based diagnostic tools for priority preemptive schedulers
In one embodiment, a method for margin determination for a computing system with a real time operating system and priority preemptive scheduling comprises: scheduling a set of tasks to be executed in one or more partitions, wherein each is assigned a priority, wherein the tasks comprise periodic and/or aperiodic tasks; executing the set of tasks on the computing system within the scheduled periodic time window; introducing an overhead task executed for an execution duration controlled either by the real time operating system or by the overhead task; controlling the overhead task to converge on a point of failure at which a length of the execution duration of the overhead task causes either: 1) a periodic task to fail to execute within a deadline, or 2) time available for the aperiodic tasks to execute to fall below a threshold; and defining a partition margin corresponding to the point of failure.
VISUALIZATION SYSTEM FOR DEBUG OR PERFORMANCE ANALYSIS OF SOC SYSTEMS
An interface receives reported information from a system on chip (SOC), where the reported information includes: (1) hardware-reported information that is reported by a hardware functional module included in the SOC and (2) firmware-reported information that is reported by a firmware functional module included in the SOC. A processor receives one or more display settings and generates visual information based at least in part on: (1) the one or more display settings, (2) the hardware-reported information, and (3) the firmware-reported information. The visual information is displayed via a display.
Information processing apparatus and information processing method
An information processing device includes: an identifier adding unit that adds identifiers including at least one type of valid identifier to each of a plurality of pieces of information; a plurality of input memories that hold the plurality of pieces of information and the identifiers, respectively; a plurality of output memories that hold a plurality of pieces of information processed by the processing unit and the identifiers added to the plurality of pieces of information, respectively; and an identifier inspecting and verifying unit that performs inspection and verification by comparing at least one identifier that becomes an inspecting and verifying target identifier among the identifiers to the valid identifier held in the input memory corresponding to the output memory that holds the inspecting and verifying target identifier.
Anomaly detection in real-time multi-threaded processes on embedded systems and devices using hardware performance counters and/or stack traces
An aspect of behavior of an embedded system may be determined by (a) determining a baseline behavior of the embedded system from a sequence of patterns in real-time digital measurements extracted from the embedded system; (b) extracting, while the embedded system is operating, real-time digital measurements from the embedded system; (c) extracting features from the real-time digital measurements extracted from the embedded system while the embedded system was operating; and (d) determining the aspect of the behavior of the embedded system by analyzing the extracted features with respect to features of the baseline behavior determined.
WATCHDOG TIMER DEVICE
A watchdog timer device according to one or more embodiments may include a mode setting unit that sets a first mode or a second mode. In the first mode, the watchdog timer device monitors an operation state of a monitored device and generates an interrupt signal to cause the monitored device to perform recovery processing at a first timeout. In the second mode, the watchdog timer device monitors the recovery processing and generates a reset signal to restart the monitored device at a second timeout. The watchdog timer device uses different logic to execute determining the first timeout in the first mode and determining the second timeout in the second mode.
IDENTIFIERS OF CRASH EVENT WORK ITEMS
In some examples, a system comprises a network interface; a storage device comprising machine-readable instructions; and a processor coupled to the network interface, the processor to access the storage device, wherein execution of the machine-readable instructions causes the processor to: collect crash event data; categorize the crash event data by an application executing when the crash event occurred; identify a crash event corresponding to the crash event data; create an identifier for the crash event; compare the identifier of the crash event to a list of work items, wherein each work item has an identifier; and update the list of work items based on the comparison.
ANOMALY DETECTION ON DYNAMIC SENSOR DATA
Methods and systems for anomaly detection include determining whether a system is in a stable state or a dynamic state based on input data from one or more sensors in the system, using reconstruction errors from a respective stable model and dynamic model. It is determined that the input data represents anomalous operation of the system, responsive to a determination that the system is in a stable state, using the reconstruction errors. A corrective operation is performed on the system responsive to a determination that the input data represents anomalous operation of the system.
INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND PROGRAM
An information processing system, an information processing method, and a program that can examine an abnormal event based on abnormal time-series data including a plurality of signal data pieces are provided. An information processing device includes an acquisition unit configured to acquire a plurality of time-series data pieces, each time-series data piece including a plurality of signal data pieces, and the plurality of time-series data pieces including a plurality of normal time-series data pieces and abnormal time-series data, and an examination unit configured to determine for each signal data piece whether the abnormal time-series data is similar to each normal time-series data piece in each time section and examine an abnormal event based on a result of the determination.
HARDWARE-BASED SENSOR ANALYSIS
A method of monitoring messages from a sensor using an integrated circuit is provided. The messages include data measured by that sensor. The method includes reading a first message from interconnect circuitry of the integrated circuit. The interconnect circuitry connects the sensor to one or more core devices configured to process the messages. A first hash value is calculated for the first message. The first hash value is compared to one or more prior hash values stored in a hash store. Each prior hash value of the one or more prior hash values corresponds to a message that was read from the interconnect circuitry prior to the first message. A corrective action is performed when a difference between the first hash value and at least one of the prior hash values stored in the hash store is below a predetermined threshold.