In various examples, a VPU and associated components may be optimized to improve VPU performance and throughput. For example, the VPU may include a min/max collector, automatic store predication functionality, a SIMD data path organization that allows for inter-lane sharing, a transposed load/store with stride parameter functionality, a load with permute and zero insertion functionality, hardware, logic, and memory layout functionality to allow for two point and two by two point lookups, and per memory bank load caching capabilities. In addition, decoupled accelerators may be used to offload VPU processing tasks to increase throughput and performance, and a hardware sequencer may be included in a DMA system to reduce programming complexity of the VPU and the DMA system. The DMA and VPU may execute a VPU configuration mode that allows the VPU and DMA to operate without a processing controller for performing dynamic region based data movement operations.

An information handling system includes resistive short detection circuitry that measures a first amount of power provided by a power supply system, and measures a second amount of power drawn by components. The resistive short detection circuitry compares the first amount of power with the second amount of power. In response to first amount of power being greater than the second amount of power, the resistive short detection circuitry determines that a short exists within the information handling system.

The present disclosure provides methods for detecting faults in a distributed computing network system. The method includes receiving, from a management services, authority information identifying peer computing devices of a distributed computing network system. For each respective peer computing device, a first message comprising a first instance of a dataset and a second message comprising a second instance of the dataset are received. Where the first peer computing device and the second peer computing device have authority over the data set, it is determined whether the first instance of the dataset matches the second instance of the dataset. Where the first instance of the dataset does not match the second instance of the dataset, a fault message is sent to the management services indicating that a fault has been detected at the first peer computing device.

A system is described. The system includes at least one power supply, a control system communicatively coupled to the at least one power supply, a communication module, and at least one channel connecting the at least one power supply to the communication module. The at least one channel is also configured to support communication according to a particular communication protocol. The communication module is configured to interface with two or more power supplies of the at least one power supply via the at least one channel, and each power supply of the at least one power supply is configured to transmit diagnostic data associated with the power supply to the communication module via the at least one channel.

A memory system and a memory controller are disclosed. By determining whether an error has occurred in target data stored in a predetermined target memory area of the memory device and determining, in response to whether an error has occurred in the target data, the magnitude of the supplied power based on a first operation parameter selected among predetermined candidate operation parameters in connection with the magnitude of the supplied power, the memory controller may stably drive a firmware, and may handle an operation error of the firmware due to a change in external environment.

In various examples, a VPU and associated components may be optimized to improve VPU performance and throughput. For example, the VPU may include a min/max collector, automatic store predication functionality, a SIMD data path organization that allows for inter-lane sharing, a transposed load/store with stride parameter functionality, a load with permute and zero insertion functionality, hardware, logic, and memory layout functionality to allow for two point and two by two point lookups, and per memory bank load caching capabilities. In addition, decoupled accelerators may be used to offload VPU processing tasks to increase throughput and performance, and a hardware sequencer may be included in a DMA system to reduce programming complexity of the VPU and the DMA system. The DMA and VPU may execute a VPU configuration mode that allows the VPU and DMA to operate without a processing controller for performing dynamic region based data movement operations.

Methods and apparatus for adaptive integrity levels in electronic and programmable logic systems. In one example, an interface for communication between a first component and a second component is provided. The interface includes logic configured to change an integrity level for a communication from the first component to the second component during operation of the first component and the second component.

Methods and apparatus to implement safety applications associated with process control systems are disclosed. An apparatus includes a configuration controller to: provide a plurality of available safety applications for implementation by a safety trip device to a user for selection, a first one of the safety applications associated with a first set of I/O signals, a second one of the safety applications associated with a second set of I/O signals, the first safety application implemented based on first pre-programmed instructions stored in memory of the safety trip device, the second safety application implemented based on second pre-programmed instructions stored in the memory; and, in response to a user selection of the first safety application, prompt the user to specify values for configuration settings associated with the first safety application. The apparatus also includes an I/O analyzer to implement the first safety application.

The exemplary embodiments are related to a device, a system, and a method for implementing a hardware mechanism that is configured to validate the performance of scheduling software utilized by a safety-critical system. The hardware device may receive an indication that a first frame of a frame schedule is in use. The hardware device may also monitor a time parameter corresponding to the first frame. The hardware device may also determine whether an indication that a second frame of the frame schedule is in use is received prior to the expiration of the time parameter. When the indication that the second frame of the frame scheduler is in use is not received prior to the expiration of time parameter, the hardware device may send a signal to an operating system of the safety-critical system indicating that an error in executing the frame scheduled has occurred.

A displaying equipment at least including an image controlling module, a primary system module, and a system controlling module is disclosed. The image controlling module continuously receives an input image from an image sensitive device after activates, and directly outputs the received input image. The system controlling module constantly monitors the primary system module after activates to determine whether the primary system module activates completely. The primary system module runs an operating system after being activated to process the input image and to generate a processed image. After the primary system module activates completely, the image controlling module outputs both the input image and the processed image simultaneously. When the primary system module is abnormal, the image controlling module restores to output the input image only.