G06F11/3062

Reducing save restore latency for power control based on write signals

A method of save-restore operations includes monitoring, by a power controller of a parallel processor (such as a graphics processing unit), of a register bus for one or more register write signals. The power controller determines that a register write signal is addressed to a state register that is designated to be saved prior to changing a power state of the parallel processor from a first state to a second state having a lower level of energy usage. The power controller instructs a copy of data corresponding to the state register to be written to a local memory module of the parallel processor. Subsequently, the parallel processor receives a power state change signal and writes state register data saved at the local memory module to an off-chip memory prior to changing the power state of the parallel processor.

Memory device with configurable performance and defectivity management

A memory device comprises a memory control unit including a processor configured to control operation of the memory array according to a first memory management protocol for memory access operations, the first memory management protocol including boundary conditions for multiple operating conditions comprising program/erase (P/E) cycles, error management operations, drive writes per day (DWPD), and power consumption; monitor operating conditions of the memory array for the P/E cycles, error management operations, DWPD, and power consumption; determine when a boundary condition for one of the multiple operating conditions is met; and in response to determining that a first boundary condition for a first monitored operating condition is met, change one or more operating conditions of the first memory management protocol to establish a second memory management protocol for the memory access operations, the second memory management protocol including a change boundary condition of a second monitored operating condition.

Configurable integrated circuit (IC) with cyclic redundancy check (CRC) arbitration

An integrated circuit (IC) includes: a storage having a storage interface and addressable bytes, the storage interface coupled to first and second sets of peripheral terminals; control circuitry having control circuitry inputs and control circuitry outputs, the control circuitry inputs coupled to the storage interface and configured to receive configuration bits provided by the storage responsive to a control circuitry update trigger, and the control circuitry outputs coupled to first and second sets of peripheral outputs; and a cyclic-redundancy check (CRC) engine coupled to the storage interface, the CRC engine configured to distinguish between purposeful updates to the data in the storage and bit errors in the data in the storage.

System and method for diagnosing resistive shorts in an information handling system
11592891 · 2023-02-28 · ·

An information handling system includes resistive short detection circuitry that measures a first amount of power provided by a power supply system, and measures a second amount of power drawn by components. The resistive short detection circuitry compares the first amount of power with the second amount of power. In response to first amount of power being greater than the second amount of power, the resistive short detection circuitry determines that a short exists within the information handling system.

Gateway system with multiple modes of operation in a fleet management system

A method and a gateway system of a mobile asset are described. A voltage produced by a power system of the mobile asset is monitored by a gateway system. In response to determining that a first fluctuation occurs in the voltage produced by the power system of the mobile asset over a first interval of time, the gateway system operates in a first mode. In response to determining that a value of the voltage produced by the power system of the mobile asset is less than a voltage threshold, the gateway system automatically transitions to operating in a second mode, which is different from the first mode and causes the gateway system to consume less power than when it is operating in the first mode.

METHODS AND APPARATUSES FOR CHARACTERISTIC MANAGEMENT WITH SIDE-CHANNEL SIGNATURE ANALYSIS

Some embodiments described herein include an apparatus having a processor communicatively coupled to a memory. The processor is configured to monitor, at a characteristic controller, a first characteristic of an electronic device. The processor is then configured to receive side-channel signature analysis of the electronic device from a signature analyzer. The processor is configured to determine if the first characteristic of the electronic device has changed or will change in a predefined period of time based on the side-channel signature analysis. The processor is then configured to adjust a second characteristic of the electronic device and/or filtering characteristics such that the side-channel signature analysis reflects predefined side-channel behavior.

ERROR REPORTING FOR NON-VOLATILE MEMORY MODULES

A memory controller includes a memory channel controller adapted to receive memory access requests and dispatch associated commands addressable in a system memory address space to a non-volatile storage class memory (SCM) module. The non-volatile error reporting circuit identifies error conditions associated with the non-volatile SCM module and maps the error conditions from a first number of possible error conditions associated with the non-volatile SCM module to a second, smaller number of virtual error types for reporting to an error monitoring module of a host operating system, the mapping based at least on a classification that the error condition will or will not have a deleterious effect on an executable process running on the host operating system.

ENVIRONMENTAL IMPACT EVALUATION APPARATUS, ENVIRONMENTAL IMPACT EVALUATION METHOD AND PROGRAM
20230025792 · 2023-01-26 ·

An environmental impact assessment device includes: an input unit configured to accept an input of a utilization purpose of an ICT service from a user, the ICT service being a target of assessment of a reduction effect for an environmental load; a first identification unit configured to refer to a storage unit in which, for each existing case about the assessment, an assessment result about the reduction effect for the environmental load for each activity item and a utilization purpose of the ICT service in the existing case are stored in association with each other, and to identify an existing case associated with the input utilization purpose; a second identification unit configured to identify an activity item for which the reduction effect is highest, for each existing case identified by the first identification unit; an acquisition unit configured to acquire a value of a parameter for an assessment expression for the environmental load, the assessment expression being previously set for each of the activity item identified by the second identification unit and utilization of an apparatus relevant to the ICT service; and a calculation unit configured to substitute the value acquired by the acquisition unit into the assessment expression, and to calculate a value of the environmental load for each of the activity item identified by the second identification unit and the utilization of the apparatus, and thereby, simplifies the assessment of the environmental load reduction effect due to the ICT service.

ENVIRONMENTAL IMPACT POWER CONSUMPTION RATING FOR APPLICATIONS
20230027162 · 2023-01-26 ·

Systems and methods for generating a power consumption rating include receiving instrumentation data corresponding to a plurality of applications. The received instrumentation data is processed to calculate a relative power consumption value for each application of the plurality of applications. The relative power consumption value for each application is compared and a power consumption rating for each application based on the comparison is generated, thereby providing a visual indicator of power consumption for the applications that can be easily evaluated.

Minimizing power loss and reset time with media controller suspend

A processing device in a memory sub-system detects a preemptive power loss condition in the memory sub-system and, in response, causes operations of a local media controller associated with a memory device in the memory sub-system to be suspended, wherein responsive to being suspended, the local media controller to perform power loss handling operations to complete a subset of a plurality of pending memory access operations, and wherein to perform the power loss handling operations, the local media controller to complete the subset of the plurality of pending memory access operations for which an acknowledgment signal has been sent to a requestor. The processing device further detects a full power loss and restore condition in the memory sub-system, responsive to detecting the full power loss and restore condition, initializes the memory device and causes operations of the local media controller to resume.