Disclosed is a window kernel fuzzing technique utilizing type information obtained through binary static analysis. The method of fuzzing a kernel of a computer operating system performed by a fuzzing system may include the steps of: automatically inferring type information of a system call using a library file provided by the computer operating system; and performing system call fuzzing on the basis of the type information of the system call obtained through the inference.

The disclosure relate to detecting performance regressions in software used to control autonomous vehicles. For instance, a simulation may be run using a first version of the software. While the simulation is running, CPU and memory usage by one or more functions of the first version of the software may be sampled. The sampled CPU and memory usage may be compared to CPU or memory usage by each of the one or more functions in a plurality of simulations each running a corresponding second version of the software. Based on the comparisons, an anomaly corresponding to a performance regression in the first version of the software relating to one of the one or more functions may be identified. In response to detecting the anomaly, the first version of the software and the one of the one or more functions may be flagged for review.

A method of rendering a graphical user interface (GUI) comprising an application topology graph for a microservice architecture comprises generating a plurality of traces from a first plurality of spans generated by instrumented services in the architecture and generating generate a second plurality of spans for uninstrumented services using information extracted from the first plurality of spans. The method further comprises grouping the second plurality of spans with the plurality of traces. Subsequently, the method comprises traversing the traces and collecting a plurality of span pairs from the plurality of traces, wherein each pair of the span pairs is associated with a call between two services. The method also comprises aggregating information across the plurality of span pairs to reduce duplicative information associated with multiple occurrences of a same span pair from the plurality of span pairs. Finally, the method comprises rendering the application topology graph using the aggregated information.

A verification control apparatus (1) includes: a first region (12) that is a virtualization execution region where a first information system including a first file operates; a second region (13) that is a virtualization execution region where a common environment setting with the first region is applied and a second information system in which the first file in the first information system is replaced with a second file operates; a storage unit (14) that stores setting information in which an operation setting is made for one of the first region and the second region, and a verification setting is made for the other; an input control unit (11) that transfers a processing request to each of a region where the operation setting is made and a region where the verification setting is made; and an output control unit (15) that transfers, when an output of a processing result for the processing request is detected from a region where the operation setting is made, the processing result to a transmission destination of the processing result, and inhibits, when an output of a processing result for the processing request is detected from a region where the verification setting is made, transfer to a transmission destination of the processing result.

A system is provided to validate a computer processor. The system includes a computing system configured to obtain core dump data including executable instructions corresponding to a code stored in a legacy processor. An instruction-level simulator is installed in the computing system and is configured to simulate the executable instructions to generate a plurality of instruction traces. The system further includes a pre-silicon chip model simulator configured to execute the instruction traces to generate performance data. The computer processor is verified based at least in part on the performance data.

A trace subsystem of an emulation system may generate differential frame data based upon successive frames. If one compression mode, the trace subsystem may set a flag bit and store differential frame data if there is at least one non-zero bit in the differential frame data. If the differential frame data includes only zero bits, the trace subsystem may set the flag bit without storing the frame data. In another compression mode, the computer may further compress the differential data if the frame data includes one (one-hot) or two (two-hot) non-zero bits. The controller may set flag bits to indicate one of all-zeroes, one-hot, two-hot, and random data conditions (more than two non-zero bits). For one-hot or two-hot conditions, the controller may store bits indicating the positions of the non-zero bits. For random data conditions, the controller may store the entire differential frame.

Implementations include providing a robotic model representative of a robotic system, determining baseline data by executing a simulation using the robotic model and a simulation world that represents the environment, generating, by a perturbation system, perturbations to be included in a set of test cases, each test case including at least one perturbation to at least one object relative to a baseline of the at least one object determined from the baseline data, determining test result data for the set of test cases by modifying the at least one object in view of the at least one perturbation to provide a modified object and executing the simulation with the modified object, and displaying a graph representative of the at least one object based on the baseline data and test result data for a test case, the graph depicting variance of the object during the simulation using the test case.

Examples relate to load testing. The examples disclosed herein enable obtaining lines of code that are recorded as an application is executed in a client computing device, the lines of code being recorded in chronological order of the execution; determining whether a dependency on at least one variable exists in individual lines of the lines of code; in response to determining that the dependency exists, storing the dependency in a data storage; identifying, from the lines of code, a line of code including a network call statement that calls a called variable; and eliminating a first subset of the lines of code based on the called variable and dependencies stored in the data storage, wherein a second subset of the lines of code that remain after the elimination comprises user-entered parameter data.

Example methods and systems for software bug reproduction. One example method may comprise obtaining log information associated with multiple transactions processed by a control-plane node to configure a set of data-plane nodes and transform an initial network state to a first network state; and configuring a replay environment that is initialized to the initial network state, and includes a mock control-plane node and a set of mock data-plane nodes. The method may also comprise, based on the log information, replaying the multiple transactions using the mock control-plane node to configure the set of mock data-plane nodes and transform the replay environment from the initial network state to a second network state. Based on a comparison between the first network state and the second network state, a determination may be made as to whether a software bug is successfully reproduced in the replay environment.

Systems, methods, tangible non-transitory computer-readable media, and devices associated with testing, simulation, or operation of an autonomous device including an autonomous vehicle are provided. For example, a service entity computing system can perform operations including obtaining operating software data associated with operating software of the autonomous vehicle. Log data associated with one or more real-world scenarios can also be obtained. One or more first simulations of the operating software can be performed based on the one or more real-world scenarios. A latency distribution profile associated with the operating software can be generated based on the one or more first simulations. One or more second simulations of the operating software can be performed based on the latency distribution profile and one or more artificially generated scenarios. Furthermore, a real-world behavior of the autonomous vehicle can be predicted based on the one or more second simulations.