The present disclosure includes apparatuses and methods for in data path compute operations. An example apparatus includes an array of memory cells. Sensing circuitry is selectably coupled to the array. A plurality of shared input/output (I/O) lines provides a data path. The plurality of shared I/O lines selectably couples a first subrow of a row of the array via the sensing circuitry to a first compute component in the data path to move a first data value from the first subrow to the first compute component and a second subrow of the respective row via the sensing circuitry to a second compute component to move a second data value from the second subrow to the second compute component. An operation is performed on the first data value from the first subrow using the first compute component substantially simultaneously with movement of the second data value from the second subrow to the second compute component.

Provided is an electronic device. The electronic device includes: a main body mounted with an electronic unit including a controller, including a bezel disposed at the outer side thereof, and having a locking groove formed in the bezel; and a band part mounted with an additional device for exchanging an electric signal with the electronic unit and an electronic part providing information related to the additional device for the electronic unit, and including a coupling part detachably coupled to the locking groove. Here, the controller switches an operation mode of the main body according to the information related to the additional device provided by the electronic part when the main body and the band part are coupled to each other. Thus, when the band part mounted with the additional device is connected to the main body, the operation mode of the main body is automatically switched to a mode corresponding to the additional device, thereby providing convenience of use.

An information processing device having a processor and memory, and including one or more accelerators and one or more storage devices, wherein: the information processing device has one network for connecting the processor, the accelerators, and the storage devices; the storage devices have an initialization interface for accepting an initialization instruction from the processor, and an I/O issuance interface for issuing an I/O command; and the processor notifies the accelerators of the address of the initialization interface or the address of the I/O issuance interface.

A material handling system, associated with the delivery of one or more payloads, may include a material handling vehicle configured to haul a payload from a first location to a second location. The material handling vehicle may include a sensor to obtain information associated with a payload, of the one or more payloads, and a vehicle device configured to receive a signal from the sensor to obtain information associated with the payload and to communicate with a server device, via a network, to send the information associated with the payload and to send and/or receive information associated with a material handling project. The material handling vehicle may further include a vehicle identifier to uniquely identify the material handling vehicle.

A material handling system, associated with the delivery of one or more payloads, may include a material handling vehicle configured to haul a payload from a first location to a second location. The material handling vehicle may include a sensor to obtain information associated with a payload, of the one or more payloads, and a vehicle device configured to receive a signal from the sensor to obtain information associated with the payload and to communicate with a server device, via a network, to send the information associated with the payload and to send and/or receive information associated with a material handling project. The material handling vehicle may further include a vehicle identifier to uniquely identify the material handling vehicle.

Provided is a server delay control system for performing, on a server including a Host OS, packet transfer between a physical NIC connected to the Host OS and an application deployed in a user space. A server delay control device configured to perform polling for packet transfer on behalf of the application is deployed in the user space. The server delay control device creates, between the application and the physical NIC, a communication path for communication via socket communication. The communication path includes a first queue and a second queue. The server delay control device includes: a packet dequeuer configured to poll whether a packet has been enqueued into the first queue and to dequeue the enqueued packet from the first queue; and a packet enqueuer configured to enqueue the dequeued packet into the second queue in the same context as the polling and dequeuing without causing a context switch.

Provided is a server delay control system for performing, on a server including a Host OS, packet transfer between a physical NIC connected to the Host OS and an application deployed in a user space. A server delay control device configured to perform polling for packet transfer on behalf of the application is deployed in the user space. The server delay control device creates, between the application and the physical NIC, a communication path for communication via socket communication. The communication path includes a first queue and a second queue. The server delay control device includes: a packet dequeuer configured to poll whether a packet has been enqueued into the first queue and to dequeue the enqueued packet from the first queue; and a packet enqueuer configured to enqueue the dequeued packet into the second queue in the same context as the polling and dequeuing without causing a context switch.

A processor-to-processor agent to provide connectivity over a processor-to-processor interconnect between services/network functions on different processors on a same compute node in a server is provided. The processor-to-processor agent can intercept socket interface calls using a network traffic filter in the network stack and redirect the packets based on traffic matching rules.

A processor-to-processor agent to provide connectivity over a processor-to-processor interconnect between services/network functions on different processors on a same compute node in a server is provided. The processor-to-processor agent can intercept socket interface calls using a network traffic filter in the network stack and redirect the packets based on traffic matching rules.

Provided are a method and apparatus for multi-bus device fused access. The method includes: receiving, by a bus, an instruction for accessing a fused node of a device, which instruction containing a matching word, an initial address, and an offset; performing matching according to the matching word and activating a fused drive; acquiring, by the fused drive, the initial address and the offset from the instruction on the bus respectively; computing an address of a first bus of the device according to the initial address, and computing an address of a second bus of the device according to the initial address and the offset; and accessing the device according to the address of the first bus so as to acquire first information, and accessing the device according to the address of the second bus so as to acquire second information.