Examples are described herein for dynamically allocating shared bus lanes provided by a peripheral component bridge. A multiplexor may be operably coupled with the bridge via the shared bus lanes. A plurality of peripheral component slots may each be operably coupled with the multiplexor via a respective plurality of peripheral bus lanes. The multiplexor may multiplex the shared bus lanes to multiple different peripheral component slots. Circuitry may: interrogate each of the peripheral component slots to obtain information about a modular component installed in the peripheral component slot, wherein the information about the modular component includes a usable range of bus lanes and a transmission speed capability; and cause the multiplexor to dynamically allocate the number of shared bus lanes to the respective pluralities of peripheral bus lanes of the peripheral component slots based on the usable ranges and transmission speed capabilities of the installed modular components.

A multi-function device is disclosed. A first port may be used to communicate with a host processor. A second port may be used to communicate with a storage device. A third port may be used to communicate with a computational storage unit. Circuit may be used to route a message from the host processor to at least one of the storage device or the computational storage unit.

A car mobile phone connection device includes: a USB connector socket or a car cigarette lighter socket, and a mobile phone holder including a paired USB connector plug or a car cigarette lighter plug and a mobile phone connection holding mechanism; wherein the socket has one or more of sunken external thread, raised external thread, sunken bayonet slot, raised bayonet slot, screw holes; the plug has flange and internal thread locking cap, flange and bayonet locking cap, flange and screw through-hole plate and screws, or screw through-hole flange and screws; the mobile phone connection holding mechanism has a mobile phone connector plug, a wireless charging board, or an NFC communication board. The socket is installed in the car. The mobile phone is set on the mobile phone connection holding mechanism, fixed on the car through the plug and the socket, and connected to a power supply of the car.

A docking station and a control method thereof are provided. The docking station includes a first USB interface, a second USB interface, a video signal output terminal, a microcontroller, a first signal multiplexer, a second signal multiplexer, a video signal processor, and a video signal converter. The microcontroller determines whether the first USB interface or the second USB interface is connected to an electronic device. When the first USB interface is connected to the electronic device, the microcontroller sets the first USB interface as an uplink port. The uplink port receives a signal from the electronic device, and selects and outputs a video signal through the signal. The video signal processor is configured to receive and process the video signal. The video signal converter converts the video signal into a video output signal that is capable of being output to the video signal output terminal for playing.

Enabling a protocol for efficiently and reliably using the NVME protocol over a network, referred to as NVME over Network, or NVMEoN, may include an NVMEoN exchange layer for handling exchanges between initiating and target nodes on a network, a burst transmission protocol that provides guaranteed delivery without duplicate retransmission, and an exchange status block approach to manage state information about exchanges.

An adaptation method between PCIE and SPI realized based on FPGA, comprising following steps: S01: a PCIE equipment sends PCIE information to a mapping module through a PCIE module; S02: the mapping module extracts SPI information from the PCIE information and transmits the SPI information to a SPI equipment through an SPI module; all of the PCIE module, the mapping module and the SPI module are located on a FPGA chip; S03: the SPI equipment performs a read/write operation according to the SPI information, and feeds back SPI operation information subjected to the read/write operation to the mapping module; S04: the mapping module modifies PCIE information according to the SPI operation information to obtain PCIE feedback information; S05: the PCIE equipment reads the PCIE feedback information through the PCIE module. The present invention provides a conversion adapter and a method between PCIE and SPI realized based on FPGA to realize conversion for a PCI interface and a SPI interface, so as to perform a read/write operation of an AD chip with the SPI interface or a DA chip with the SPI interface, which has universal applicability.

A method may include interacting with an interface for one or more computational devices, wherein the interacting is based on an identifier, and wherein the identifier comprises information that identifies a functionality of a computational device functions. The information may include a functionality identifier. The identifier may further include information that identifies a group of the computational device function. The group of the computational device function may be based on a source of the computational device function. The information that identifies the functionality of a computational device function may include a functionality identifier, and the information that identifies the group of the computational device function may include a group identifier. The functionality identifier may include a unique function identifier, and the group identifier may include an organizationally unique identifier.

A system and apparatus can include a port for transmitting data; and a link coupled to the port. The port can include a physical layer device (PHY) to decode a physical layer packet, the physical layer packet received across the link. The physical layer packet can include a first bit sequence corresponding to a first ordered set, and a second bit sequence corresponding to a second ordered set, the first bit sequence immediately adjacent to the second bit sequence. The first ordered set is received at a predetermined ordered set interval, which can occur following a flow control unit (flit). The first ordered set comprises eight bytes and the second ordered set comprises eight bytes. In embodiments, bit errors in the ordered sets can be determined by checking bits received against expected bits for the ordered set interval.

A method of determining which of at least two connected mobile devices is to function as a host device, wherein the mobile devices first determine which of them is to act as an initial host device and which is to act as an initial peripheral device. The initial host device then receives instructions from a user as to which of the mobile devices is to be the host device. If the instructions indicate that the initial host device is to be the host device, the initial host device controls, as host device, the initial peripheral device as a peripheral device, and if the instructions indicate that the initial peripheral device is to be the host device, the initial host device passes control to the initial peripheral device to enable the initial peripheral device to control, as host device, the initial host device as a peripheral device.

A method includes generating, by a control unit of a first device, a handshaking signal to be transmitted to a second device via a second channel. The method further includes based on the handshaking signal being acknowledged by the second device, configuring, by the control unit, the second channel to communicate non-display data and configuring a first channel connecting the first device to the second device to selectively communicate either display data or non-display data; and based on the handshaking signal being not acknowledged by the second device, configuring, by the control unit, the first channel to communicate display data.