G06F13/40

Methods for data bus inversion
20230052170 · 2023-02-16 ·

An electronic device includes a bus driver and circuitry. The bus driver is coupled to a parallel bus including N data lines. The circuitry is configured to receive a data unit for transmission over the N data lines, to determine a first count indicative of a number of data bits in the data unit having a predefined value, and a second count indicative of a number of inverted data bits relative to corresponding bits in a previously transmitted data unit, to make a decision of whether to invert the data unit based on the first and second counts, depending on whether such inversion is expected to reduce power consumption of transmitting the data unit over the bus, to produce an output data unit by retaining or inverting the data unit based on the decision, and to transmit the output data unit over the data lines via the bus driver.

LGA SOCKET PINS FOR IMPROVED DIFFERENTIAL SIGNALING PERFORMANCE
20230046581 · 2023-02-16 ·

An apparatus and method for reducing differential cross-talk in a pin arrangement of a socket are described. Socket pins within a differential pair use a modified shape to tighten the intra-pair pin coupling to reduce the crosstalk without changing the pin map. The middle vertical segment of one pin of a diagonally adjacent differential pin pair is modified to be closer to the other pin than other corresponding locations of the pins. The spring beam that extends from the middle vertical segment of the one pin is modified to accommodate the package landing pad that the spring beam contacts to maintain a uniform pitch.

OCP ADAPTER CARD AND COMPUTER DEVICE
20230047735 · 2023-02-16 ·

An open compute project (OCP) adapter card and a computer device are disclosed. The adapter card includes an OCP connector, a controller, a selector, and a motherboard connector. The OCP connector is configured to connect to an OCP network interface card (NIC). The controller is configured for bandwidth allocation, in-situ control and power-on/off control of the OCP NIC. The selector gates a single-homed host or a dual-homed host based on working mode configuration information stored in the controller. The motherboard connector is configured to connect to a motherboard device.

COMMUNICATING SYSTEM COMPRISING A REMOVABLE DEVICE AND A DOCKING DEVICE
20230048357 · 2023-02-16 ·

The present invention relates to a communication system comprising a removable device comprising a display screen, and a docking device apt to receive the removable device.

Each of the removable device and the docking device comprises an extreme high frequency communication chip, the communication chips being positioned opposite each other when the removable device is received in the docking device and are apt to exchange digital data between each other.

The display screen is apt to display images from the digital data sent by the communication chip of the docking device to the communication chip of the removable device.

DATA NETWORK HAVING AT LEAST THREE LINE BRANCHES, WHICH ARE CONNECTED TO ONE ANOTHER VIA COMMON STAR NODE AS WELL AS A MOTOR VEHICLE AND OPERATING METHOD FOR THE DATA NETWORK
20230048283 · 2023-02-16 ·

A data network has at least three line branches connected via a common star node to distribute message signals from one of the line branches onto the other line branches, wherein connected to at least one of the line branches is at least one bus-user device is configured to generate in a corresponding transmit mode by a corresponding transmit unit at least one of the message signals, wherein in the corresponding bus-user device, the transmit unit has a current source circuit which, in generating the message signal (16), is configured to inject an electric current into electrical lines of the line branch to which the bus-user device is connected, and via the current source circuit the lines are connected to an internal impedance value of the current source circuit that in transmit mode is constantly greater than 10 times the value of the characteristic impedance, for example greater than 500 Ohms.

TRANSCEIVER DEVICE AND COMMUNICATION CONTROL DEVICE FOR A USER STATION OF A SERIAL BUS SYSTEM, AND METHOD FOR COMMUNICATING IN A SERIAL BUS SYSTEM
20230049285 · 2023-02-16 ·

A transceiver device, communication control device, and method for a user station of a serial bus system. The transceiver device includes a first terminal for receiving a transmission signal from a communication control device, a transmission module for transmitting the transmission signal onto a bus, a reception module for receiving the signal from the bus, the reception module configured to generate a digital reception signal from the signal received from the bus, a second terminal for sending the digital reception signal to the communication control device and for receiving an operating mode changeover signal from the communication control device, and a changeover feedback block for outputting feedback regarding a changeover of the operating mode that has taken place based on the operating mode changeover signal. The changeover feedback block is configured to output the feedback to the communication control device via the second terminal and in the digital reception signal.

METHOD AND DEVICE FOR DETECTING HARD DISK CONNECTION AND DISCONNECTION DURING A COMPUTER SESSION
20230050294 · 2023-02-16 ·

A device to detect hot-plugging and hot-unplugging of hard disk and the hard disk type includes a connector and a control circuit. When hot-plugged, the hard disk is coupled to the connector, the control circuit comprises delay circuit and latch circuit. The delay circuit delays a falling edge of the third signal and outputs a delay signal, the latch circuit processes the first and second signals and outputs a logical result as a latch signal. The control circuit determines the connected or disconnected status and type of the hard disk according to the respective levels of the first and second signals, the delay signal, and the latch signal. The delay signal and the latch signal work to correct error of the control circuit in determining connectivity and non-connectivity during a session due to asynchronous changes in signal levels of the first and second signals.

QUEUE BYPASSING INTERRUPT HANDLING

Within an interrupt routing structure, an interrupt handler is registered, the registering comprising storing a pointer to the interrupt handler in the interrupt routing structure. Responsive to determining that a received interrupt comprises a queuing bypass flag in a set state, the interrupt handler is executed, the executing bypassing an interrupt queueing mechanism.

Firefighting or rescue apparatus including a memory device to store and provide access to apparatus information

A firefighting or rescue apparatus includes a frame having a cab defining an interior within which a flash memory device is permanently mounted. The flash memory device is isolated so that it is incapable of receiving any onboard operating data pertaining to the operation and status of the firefighting apparatus. Instead, the device primarily stores data regarding a service manual, maintenance manual, electrical diagrams and/or troubleshooting guide related to the firefighting apparatus. The device is able to be selectively coupled to a portable computing device so that a user working on the firefighting apparatus can access the data without risk of loss or misplacement thereof. A related method also is provided.

Frame protocol of memory device

Techniques are described herein for a training procedure that identifies a frame boundary and generates a frame clock to identify the beginning and the end of a frame. After the frame training procedure is complete, a memory device may be configured to execute a frame synchronization procedure to identify the beginning of a frame based on the frame clock without the use of headers or other information within the frame during an active session of the memory device. During an activation time period after a power-up event, the memory device may initiate the frame training procedure. Once the frames are synchronized, the memory device may be configured to use that frame clock during an entire active session (e.g., until a power-down event) to identify the beginning of a frame as part of a frame synchronization procedure.