Methods, systems, apparatuses, and computer-readable storage mediums described herein enable executable code of a hardware security platform (HSP) circuit to communicate with a hypervisor in a separate processor. The hypervisor generates and manages virtual machines. The HSP code comprises trusted platform module (TPM) logic, that processes TPM commands received via the hypervisor, and in response to the processing, communicates security information (e.g., measurements, keys, authorization data) with the virtual machines via the hypervisor. The TPM logic receives security information related to a virtual machine from the hypervisor and stores the security information in non-volatile memory of the HSP circuit, where security information from a particular VM is distinguishable from security information from another VM in the HSP memory. The hypervisor (and VMs) communicate via a network fabric with the HSP circuit within an SOC, or the HSP may reside on a discrete chip and communicate via a secure encrypted channel.

The present invention provides various aspects for processing multiple types of substrates within cleanspace fabricators or for processing multiple or single types of substrates in multiple types of cleanspace environments particularly to form hardware based encryption devices and hardware based encryption equipped communication devices and multi-chip modules such as chiplets. In some embodiments, a collocated composite cleanspace fabricator may be capable of processing semiconductor devices into integrated circuits and then performing assembly operations to result in product in packaged form. Customized smart devices, smart phones and touchscreen devices may be fabricated in examples of a cleanspace fabricator. The assembly processing may include steps to form hardware based encryption.

The present invention provides various aspects for processing multiple types of substrates within cleanspace fabricators or for processing multiple or single types of substrates in multiple types of cleanspace environments particularly to form hardware based encryption devices and hardware based encryption equipped communication devices and multi-chip modules such as chiplets. In some embodiments, a collocated composite cleanspace fabricator may be capable of processing semiconductor devices into integrated circuits and then performing assembly operations to result in product in packaged form. Customized smart devices, smart phones and touchscreen devices may be fabricated in examples of a cleanspace fabricator. The assembly processing may include steps to form hardware based encryption.

An integrated circuit device including processing circuitry, communications circuitry configured to provide a communication link with a communication apparatus external to the integrated circuit device, and a memory accessible by the processing circuitry and by the communications circuitry, the memory comprising a memory region to which the processing circuitry has write access and to which the communications circuitry has read access, in which the processing circuitry is configured to write information to the memory region indicative of one or more use conditions of the integrated circuit device, and in which the communications circuitry is configured to access the memory region and to provide the information indicative of the one or more use conditions of the integrated circuit device via the communication link.

An integrated circuit device including processing circuitry, communications circuitry configured to provide a communication link with a communication apparatus external to the integrated circuit device, and a memory accessible by the processing circuitry and by the communications circuitry, the memory comprising a memory region to which the processing circuitry has write access and to which the communications circuitry has read access, in which the processing circuitry is configured to write information to the memory region indicative of one or more use conditions of the integrated circuit device, and in which the communications circuitry is configured to access the memory region and to provide the information indicative of the one or more use conditions of the integrated circuit device via the communication link.

A semiconductor device includes a first control unit, a second control unit, a random number generator, a first memory in which random numbers generated by the random number generator are stored, an encryption engine configured to perform encryption and decryption processes by using the random numbers stored in the first memory, and a second memory in which information related to random number generation is stored. The second control unit is configured to generate the random numbers by the random number generator based on the information related to random number generation.

An information handling system sets up at power-on self-test, a system management interrupt based on a trap on an input/output port used for a real-time clock and detects at runtime, an operation on the input/output port. In response to detecting the operation on the input/output port, generates the system management interrupt based on the trap on the input/output port. In addition, the information handling system handles the system management interrupt by emulating the real-time clock according to the operation on the input/output port that includes determining a register that is mapped to an index associated with the operation and accessing the register and executing a function associated with the register.

A system for entering a secure Personal Identification Number (PIN) into a mobile computing device includes a mobile computing device and a peripheral device that are connected via a data communication link. The mobile computing device includes a mobile application and a display and the mobile application runs on the mobile computing device and displays a grid on the mobile computing device display. The peripheral device includes a display and an encryption engine, and the peripheral device display displays a grid corresponding to the grid displayed on the mobile computing device display. Positional inputs on the mobile computing device grid are sent to the peripheral device and the peripheral device decodes the positional inputs into PIN digits and generates an encrypted PIN and then sends the encrypted PIN back to the mobile computing device.

A system for entering a secure Personal Identification Number (PIN) into a mobile computing device includes a mobile computing device and a peripheral device that are connected via a data communication link. The mobile computing device includes a mobile application and a display and the mobile application runs on the mobile computing device and displays a grid on the mobile computing device display. The peripheral device includes a display and an encryption engine, and the peripheral device display displays a grid corresponding to the grid displayed on the mobile computing device display. Positional inputs on the mobile computing device grid are sent to the peripheral device and the peripheral device decodes the positional inputs into PIN digits and generates an encrypted PIN and then sends the encrypted PIN back to the mobile computing device.

In one embodiment, a processor includes a memory hierarchy and a core coupled to the memory hierarchy. The memory hierarchy stores encrypted data, and the core includes circuitry to access the encrypted data stored in the memory hierarchy, decrypt the encrypted data to yield decrypted data, perform an entropy test on the decrypted data, and update a processor state based on a result of the entropy test. The entropy test may include determining a number of data entities in the decrypted data whose values are equal to one another, determining a number of adjacent data entities in the decrypted data whose values are equal to one another, determining a number of data entities in the decrypted data whose values are equal to at least one special value from a set of special values, or determining a sum of n highest data entity value frequencies.