Patent classifications
G06F2209/481
PROTOCOL EXCEPTION HANDLING EXTERNAL TO DETERMINISTIC CODE
The handling of protocol exceptions for deterministic code that communicates with external component(s). A protocol exception host updates an execution state object associated with the deterministic code as the execution of the deterministic code proceeds. The component also detects whether a protocol exception has occurred that was caused by the deterministic code communicating using the protocol with an external component. If the component detects that such a protocol exception has occurred, the component handles the protocol exception. The component also determines whether the handled protocol exception has been successfully handled. If the exception is not successfully handled, the component stops the execution of the deterministic code such that the execution state object includes execution state of the deterministic code up to the stop. Accordingly, the execution state of the deterministic code up to the stop may be later used to resume execution of the deterministic code.
TECHNIQUES FOR DEPLOYING WORKLOADS ON NODES IN A CLOUD-COMPUTING ENVIRONMENT
Described are examples for deploying workloads in a cloud-computing environment. In an aspect, based on a desired number of workloads of a process to be executed in a cloud-computing environment and based on one or more failure probabilities, an actual number of workloads of the process to execute in the cloud-computing environment to provide a level of service can be determined and deployed. In another aspect, a standby workload can be executed as a second instance of the process without at least a portion of the separate configuration used by the multiple workloads, and based on detecting termination of one of multiple workloads, the standby workload can be configured to execute based on the separate configuration of the separate instance of the process corresponding to the one of the multiple workloads.
AN APPARATUS AND METHOD FOR HANDLING EXCEPTIONS
An apparatus for handling exceptions, including a processing circuitry operable in at least one security domain to execute program code that includes a plurality of exception handling routines executed in response to corresponding exceptions, and a plurality of registers for storing data for access by the processing circuitry when executing the program code. The exception control circuitry is arranged in response to occurrence of a given exception from background processing to trigger a state saving operation to save data from the plurality of registers before triggering the processing circuitry to execute a given exception handling routine. Configuration storage provides configuration information used to categorise exception handling routines. The exception control circuitry is arranged to determine with reference to the configuration information whether the given exception handling routine is of a first or second category within the security domain that the given exception handling routine will be executed in.
Apparatus and method to identify the source of an interrupt
An apparatus and method for processing non-maskable interrupt source information. For example, one embodiment of a processor comprises: a plurality of cores comprising execution circuitry to execute instructions and process data; local interrupt circuitry comprising a plurality of registers to store interrupt-related data including non-maskable interrupt (NMI) data related to a first NMI; and non-maskable interrupt (NMI) processing mode selection circuitry, responsive to a request, to select between at least two NMI processing modes to process the first NMI including: a first NMI processing mode in which the plurality of registers are to store first data related to a first NMI, wherein no NMI source information related to a source of the NMI is included in the first data, and a second NMI processing mode in which the plurality of registers are to store both the first data related to the first NMI and second data comprising NMI source information indicating the NMI source.
EXCEPTION STACK HANDLING METHOD, SYSTEM, ELECTRONIC DEVICE AND STORAGE MEDIUM
The present disclosure provides an exception stack handling method, system, electronic device and storage medium and relates to the field of mobile Internet. The method may include: at the level of any executor in a distributed stream-type processing system including at least two executors, performing the following processing of: obtaining at least one exception stack from a message middleware when the executor in an idle state each time, collected exception stacks generated by users being stored in the message middleware; as for any exception stack, obtaining an anti-obfuscation map file corresponding to the exception stack, and performing anti-obfuscation processing for the exception stack by using the anti-obfuscation map file. The solution of the present disclosure may be applied to improve the processing speed.
Techniques for deploying workloads on nodes in a cloud-computing environment
Described are examples for deploying workloads in a cloud-computing environment. In an aspect, based on a desired number of workloads of a process to be executed in a cloud-computing environment and based on one or more failure probabilities, an actual number of workloads of the process to execute in the cloud-computing environment to provide a level of service can be determined and deployed. In another aspect, a standby workload can be executed as a second instance of the process without at least a portion of the separate configuration used by the multiple workloads, and based on detecting termination of one of multiple workloads, the standby workload can be configured to execute based on the separate configuration of the separate instance of the process corresponding to the one of the multiple workloads.
Information processing apparatus and information processing method for changing contents of a process to be performed after an interrupt is detected
There is provided an information processing apparatus including a processing unit that performs a series of processes with an external device, and a detection unit that detects an interrupt of a process other than the series of processes after the series of processes is started, in which the processing unit changes contents of a process to be performed after the interrupt is detected on the basis of a detection state of the interrupt.
Instruction interrupt suppression of overflow exception
Instruction interrupt suppression for an overflow condition. An instruction is executed, and a determination is made that an overflow condition occurred. Based on a per-instruction overflow interrupt indicator being set to a defined value, interrupt processing for the overflow condition is performed, and based on the per-instruction overflow interrupt indicator being set to another defined value, the interrupt processing for the overflow condition is bypassed.
HYPERVISOR BACKDOOR INTERFACE
A method of providing a backdoor interface between software executing in a virtual machine and a hypervisor executing on a computing system that supports the virtual machine includes trapping, at the hypervisor, an exception generated in response to execution of a debug instruction on a central processing unit (CPU) by the software; identifying, by an exception handler of the hypervisor handling the exception, an equivalence between an immediate operand of the debug instruction and a predefined value; and invoking, in response to the equivalence, a backdoor service of the hypervisor using state of at least one register of the CPU as parametric input, the state being set by the software prior to executing the debug instruction.
Critical problem exception handling
Methods, apparatus, computer program products for handling critical problem exceptions during an execution of an application are provided. The method comprises: detecting, by one or more processing units, an occurrence of a certain type of critical problem exception during an execution of an application, the critical problem exception resulting in a termination of the application; instructing, by one or more processing units, to call a Super Handling Routine (SHR) corresponding to the type of the critical problem exception at a pre-configured address based on a pre-determined context registered by the application, the SHR being configured to handle critical problem exceptions; and handing, by one or more processing units, control to the SHR to handle the type of the critical problem exception.