A system and method for offset protection data in a RAID array. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to store user data in a first page of a first storage device of the plurality of storage devices; generate intra-device protection data corresponding to the user data, and store the intra-device protection data at a first offset within the first page. The controller is further configured to generate inter-device protection data corresponding to the first page, and store the inter-device protection data at a second offset within a second page in a second storage device of the plurality of storage devices, wherein the first offset is different from the second offset.

A storage system includes a plurality of storage nodes. Each storage node of the plurality of storage nodes includes a plurality of non-volatile memory modules. The storage system also includes a processor operatively coupled to the plurality of storage nodes, to perform a method. The method includes receiving incoming data. The method further includes storing the incoming data in a redundant array of independent drives (RAID) stripe in the data storage system. The RAID stripe includes groups of data shards. Each group of data shards and a respective group parity shard are stored across the plurality of nodes of the data storage system. A set of stripe parity shards are stored in a first storage node of the plurality of storage nodes.

A system for software error-correcting code (ECC) protection or compression of original data using ECC data in a first memory is provided. The system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The software ECC protection or compression includes: a data matrix for holding the original data in the first memory; a check matrix for holding the ECC data in the first memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the ECC data; and a thread for executing on the processing core. The thread includes a Galois Field multiplier for multiplying entries of the data matrix by an entry of the encoding matrix, and a sequencer for ordering operations using the Galois Field multiplier to generate the ECC data.

Systems, methods, and circuitries are provided for supporting distributed erasure coding in a shared file system. In one example, a method is provided to be performed by an initiator device configured to read and write data in files stored in a plurality of storage nodes that are controlled by a file management system. The method includes generating a stripe by identifying data to be stored in a storage system; dividing the data into K data segments; and performing an erasure encoding operation on the K data segments to generate a parity segment, wherein the stripe includes the K data segments and the parity segment. The method includes requesting, from the file management system, respective memory allocations in the storage devices for storing respective segments of the stripe; and transmitting, to each of the plurality of storage nodes, a respective instruction to store a respective data or parity segment in the memory allocation on the respective storage device.

A redundant array of independent disks (RAID) storage device including; a memory device including first memory devices configured to store at least one of data chunks and corresponding parity (data chunks/parity) and a second memory device configured to serve as a spare memory region, and a RAID controller including a RAID internal memory configured to store a count table and configured to control performing of a rebuild operation in response to a command received from a host, wherein upon identification of a failed first memory device, the RAID controller accesses used regions of non-failed first memory devices based on the count table and rebuilds data of the failed first memory device using the second memory device.

A system and method for offset protection data in a RAID array. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to store user data in a first page of a first storage device of the plurality of storage devices; generate intra-device protection data corresponding to the user data, and store the intra-device protection data at a first offset within the first page. The controller is further configured to generate inter-device protection data corresponding to the first page, and store the inter-device protection data at a second offset within a second page in a second storage device of the plurality of storage devices, wherein the first offset is different from the second offset.

Methods and systems for enhanced error recovery are described. A first one or more data blocks to write to a first drive are received by a first drive controller module. A first parity block is calculated by the first drive controller module based on a first data block parity group. The first one or more data blocks are written by the first drive controller module to the first drive. The first parity block is written by the first drive controller module to the first drive.

An accelerated erasure coding system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The processing core, storage medium, and computer instructions are configured to implement an erasure coding system, which includes: a data matrix for holding original data in the main memory; a check matrix for holding check data in the main memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the check data; and a thread for executing on the processing core. The thread includes: a parallel multiplier for concurrently multiplying multiple entries of the data matrix by a single entry of the encoding matrix; and a first sequencer for ordering operations through the data matrix and the encoding matrix using the parallel multiplier to generate the check data.

Exemplary embodiments provide a tiered error correction code (ECC) Chipkill system, comprising: a device ECC incorporated into at least a portion of a plurality of memory devices that corrects n-bit memory device-level failures in the respective memory device, and transmits a memory device failure signal when any memory device-level failure is greater than n-bits and beyond correction capability of the device ECC device; and a system-level ECC device external to the plurality of memory devices is responsive to receiving the memory device failure signal to correct the memory device failure based on a system ECC parity.

A method obtains at least part of a file from a dispersed storage network (DSN) memory, and stores it in a data object cache. When the file is changed, a determination is made about where to store the changed file portions: in the data object cache or in the DSN. The changed file portions, for example a new copy of the part of the file obtained from the DSN, are encoded utilizing an error coding dispersal storage function, and stored in either the data object cache, or in the DSN memory.