A hybrid numeric-analog clock synchronizer, for establishing a clock or carrier locked to a timing reference. The clock may include a framing component. The reference may have a low update rate. The synchronizer achieves high jitter rejection, low phase noise and wide frequency range. It can be integrated on chip. It may comprise a numeric time-locked loop (TLL) with an analog phase-locked loop (PLL). Moreover a high-performance number-controlled oscillator (NCO), for creating an event clock from a master clock according to a period control signal. It processes edge times rather than period values, allowing direct control of the spectrum and peak amplitude of the justification jitter. Moreover a combined clock-and-frame asynchrony detector, for measuring the phase or time offset between composite signals. It responds e.g. to event clocks and frame syncs, enabling frame locking with loop bandwidths greater than the frame rate.

A hybrid numeric-analog clock synchronizer for establishing a clock or carrier locked to a frequency reference. The clock synchronizer is typically a clock multiplier and a jitter attenuator. The reference may have a low update rate. The synchronizer achieves high jitter rejection, low phase noise and wide frequency range. It can be integrated on chip.

Signals from a plurality of sensing lines of a grid based digitizer sensor based is combined based on matrix multiplication with a Hadamard Matrix. The combining provides a plurality of signal combinations. Each of the plurality of signal combinations is sampled with a different Analog to Digital Converters (ADC) in a group of ADCs. The sampling is performed simultaneously. The sampled outputs from the group of ADCs are post processed including multiplying an inverse of the Hadamard Matrix with the sampled outputs from the group of ADCs. The presence of an object interacting with the grid based digitizer sensor is detected based on the post processing.

Signals from a plurality of sensing lines of a grid based digitizer sensor based is combined based on matrix multiplication with a Hadamard Matrix. The combining provides a plurality of signal combinations. Each of the plurality of signal combinations is sampled with a different Analog to Digital Converters (ADC) in a group of ADCs. The sampling is performed simultaneously. The sampled outputs from the group of ADCs are post processed including multiplying an inverse of the Hadamard Matrix with the sampled outputs from the group of ADCs. The presence of an object interacting with the grid based digitizer sensor is detected based on the post processing.

A hybrid numeric-analog clock synchronizer, for establishing a clock or carrier locked to a timing reference. The clock may include a framing component. The reference may have a low update rate. The synchronizer achieves high jitter rejection, low phase noise and wide frequency range. It can be integrated on chip. It may comprise a numeric time-locked loop (TLL) with an analog phase-locked loop (PLL). Moreover a high-performance number-controlled oscillator (NCO), for creating an event clock from a master clock according to a period control signal. It processes edge times rather than period values, allowing direct control of the spectrum and peak amplitude of the justification jitter. Moreover a combined clock-and-frame asynchrony detector, for measuring the phase or time offset between composite signals. It responds e.g. to event clocks and frame syncs, enabling frame locking with loop bandwidths greater than the frame rate.

A touch panel device (11) includes a panel main body (21) including a plurality of first electrodes (X) extending parallel to one another and a plurality of second electrodes (Y) intersecting with the first electrodes (X), and a detection section (31). The detection section (31) includes a transmission section (33) for sequentially applying a driving signal to the first electrodes (X), and a current-voltage conversion section (35) configured to scan the second electrodes (Y) and convert a current flowing through the second electrode (Y) to a voltage signal, an AD conversion section (36) configured to sample the voltage signal and convert it to digital data, and a touch determination section (37) for determining a touch position from the converted digital data. The AD conversion section (36) samples the induced signal for a sampling period which occurs after a preset time which is determined for each of the first electrodes (X) elapses since the application of the driving signal and which includes a peak of a waveform of the induced signal.