The present disclosure relates to a method for use with an electronic design. Embodiments may include receiving one or more user defined processor configurations at a processor generator. Embodiments may also include generating a customized testbench based upon, at least in part, the user defined processor configurations and generating an RTL model while the customized testbench is generating.

The present disclosure relates to a method for use with an electronic design. Embodiments may include receiving one or more user defined processor configurations at a processor generator. Embodiments may also include generating a customized testbench based upon, at least in part, the user defined processor configurations and generating an RTL model while the customized testbench is generating.

A method of constructing an RF filter comprises designing an RF filter that includes a plurality of resonant elements disposed, a plurality of non-resonant elements coupling the resonant elements together to form a stop band having a plurality of transmission zeroes corresponding to respective frequencies of the resonant elements, and a sub-band between the transmission zeroes. The non-resonant elements comprise a variable non-resonant element for selectively introducing a reflection zero within the stop band to create a pass band in the sub-band. The method further comprises changing the order in which the resonant elements are disposed along the signal transmission path to create a plurality of filter solutions, computing a performance parameter for each of the filter solutions, comparing the performance parameters to each other, selecting one of the filter solutions based on the comparison of the computed performance parameters, and constructing the RF filter using the selected filter solution.

A method of designing a microwave filter using a computerized filter optimizer, comprises generating a filter circuit design in process (DIP) comprising a plurality of circuit elements having a plurality of resonant elements and one or more non-resonant elements, optimizing the DIP by inputting the DIP into the computerized filter optimizer, determining that one of the plurality of circuit elements in the DIP is insignificant, removing the one insignificant circuit element from the DIP, deriving a final filter circuit design from the DIP, and manufacturing the microwave filter based on the final filter circuit design.

A computer implemented method of translation of verification commands of an electronic design file of an electronic circuit defined by the electronic design file, comprising receiving, at a processor, the electronic design file defining a functional level electronic design of the electronic circuit, wherein said electronic circuit comprises at least two subsystems and said electronic circuit includes at least two configuration options for the at least two subsystems, receiving along with the electronic design file, at least one analog test harness model having at least one indirect branch contribution statement, translating said at least one indirect branch contribution statement into a plurality of direct branch contribution operators based at least in part upon said at least one analog test harness model and said electronic design file and generating a netlist for the electronic circuit based at least in part upon said translation of said at least one indirect branch contribution statement.

A computer implemented method of translation of verification commands of an electronic design file of an electronic circuit defined by the electronic design file, comprising receiving, at a processor, the electronic design file defining a functional level electronic design of the electronic circuit, wherein said electronic circuit comprises at least two subsystems and said electronic circuit includes at least two configuration options for the at least two subsystems, receiving along with the electronic design file, at least one analog test harness model having at least one indirect branch contribution statement, translating said at least one indirect branch contribution statement into a plurality of direct branch contribution operators based at least in part upon said at least one analog test harness model and said electronic design file and generating a netlist for the electronic circuit based at least in part upon said translation of said at least one indirect branch contribution statement.

A programmable impedance element consists of a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches, the two-port elements arranged in a chain fashion with a structured set of switches such that a range of impedances can be obtained from each cell by dynamically changing the connections between the impedance elements in the cell. The common cell is constructed by connecting the nominally identical two-port impedance elements in a way that the number of possible combinations of the impedance elements is reduced to the subset of all possible combinations that uses the minimum possible number of connections. This structure allows the creation of matched impedances using industry standard devices. The connections between impedance elements are switches that may be “field-programmable,” i.e., that may be set on the chip after manufacture and configured during operation of the circuit, or alternatively may be mask programmable.

A programmable impedance element consists of a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches, the two-port elements arranged in a chain fashion with a structured set of switches such that a range of impedances can be obtained from each cell by dynamically changing the connections between the impedance elements in the cell. The common cell is constructed by connecting the nominally identical two-port impedance elements in a way that the number of possible combinations of the impedance elements is reduced to the subset of all possible combinations that uses the minimum possible number of connections. This structure allows the creation of matched impedances using industry standard devices. The connections between impedance elements are switches that may be “field-programmable,” i.e., that may be set on the chip after manufacture and configured during operation of the circuit, or alternatively may be mask programmable.

Embodiments of the present disclosure include a harmonic power amplifying circuit with high efficiency and high bandwidth and a radio-frequency power amplifier. The circuit comprises an input matching network (11), a transistor (M), and an output matching network (12); a gate of the transistor (M) connected to an output end of the input matching network (11), a drain thereof connected to an input end of the output matching network (12), and a source thereof being grounded; wherein the output matching network (12) enables a lower sideband of the harmonic power amplifying circuit to work in a continuous inverse F amplification mode and an upper sideband of the harmonic power amplifying circuit to work in a continuous F amplification mode; wherein the output matching network (12) and a parasitic network of the transistor (M) form a low pass filter. By transitioning from the continuous inverse F power amplifier working mode to the continuous F power amplifier working mode, the efficiency of a continuous harmonic control power amplifier is effectively improved to be higher than 60%, a relative bandwidth is improved to be higher than 80%, and the harmonic impedance is simple to match and easy to realize.

Embodiments of the present disclosure include a harmonic power amplifying circuit with high efficiency and high bandwidth and a radio-frequency power amplifier. The circuit comprises an input matching network (11), a transistor (M), and an output matching network (12); a gate of the transistor (M) connected to an output end of the input matching network (11), a drain thereof connected to an input end of the output matching network (12), and a source thereof being grounded; wherein the output matching network (12) enables a lower sideband of the harmonic power amplifying circuit to work in a continuous inverse F amplification mode and an upper sideband of the harmonic power amplifying circuit to work in a continuous F amplification mode; wherein the output matching network (12) and a parasitic network of the transistor (M) form a low pass filter. By transitioning from the continuous inverse F power amplifier working mode to the continuous F power amplifier working mode, the efficiency of a continuous harmonic control power amplifier is effectively improved to be higher than 60%, a relative bandwidth is improved to be higher than 80%, and the harmonic impedance is simple to match and easy to realize.