G06F7/38

Distributed application execution for cloud computing

Cloud computing techniques utilizing distributed application execution are disclosed herein. One example technique includes receiving a command to launch an application, and in response, determining an execution location corresponding to a type of data consumed by individual components of the application. Upon determining that one of the components is to be executed in a local computing facility, the example technique includes transmitting, from a public computing facility to the local computing facility, a request to execute the one of the components in the local computing facility instead of the public computing facility. Upon being authorized by the local computing facility, data is requested and received from the one of the components executed at the local computing facility without having direct access from the public computing facility to a data source at the local computing facility.

QUANTUM COMPUTER AND METHOD FOR CONTROLLING SAME, QUANTUM ENTANGLEMENT DETECTING DEVICE AND QUANTUM ENTANGLEMENT DETECTING METHOD, AND MOLECULE IDENTIFYING DEVICE AND MOLECULE IDENTIFYING METHOD
20230014662 · 2023-01-19 ·

Provided is a quantum computer which makes it possible to easily carry out quantum calculation. A quantum computer (10) includes electrodes (20) and (21), a molecule (22) that is entirely or partially provided between the electrodes (20) and (21), and a current sensor 13 that detects a tunneling current which flows between the electrodes (20) and (21) via the molecule (22). The molecule (22) works as a quantum circuit for carrying out quantum calculation.

Computing device and method

The present disclosure provides a computation device. The computation device is configured to perform a machine learning computation, and includes an operation unit, a controller unit, and a conversion unit. The storage unit is configured to obtain input data and a computation instruction. The controller unit is configured to extract and parse the computation instruction from the storage unit to obtain one or more operation instructions, and to send the one or more operation instructions and the input data to the operation unit. The operation unit is configured to perform operations on the input data according to one or more operation instructions to obtain a computation result of the computation instruction. In the examples of the present disclosure, the input data involved in machine learning computations is represented by fixed-point data, thereby improving the processing speed and efficiency of training operations.

Prepare for shorter precision (round for reround) mode in a decimal floating-point instruction

An instruction is executed in round-for-reround mode wherein the permissible resultant value that is closest to and no greater in magnitude than the infinitely precise result is selected. If the selected value is not exact and the units digit of the selected value is either 0 or 5, then the digit is incremented by one and the selected value is delivered. In all other cases, the selected value is delivered.

Information processor, information processing method, and storage medium
11551087 · 2023-01-10 · ·

An information processor includes a memory; and a processor coupled to the memory and the processor configured to: acquire first statistical information about distribution of most significant bit position that is not a sign or least significant bit position that is not zero for each of a plurality of first fixed-point number data, the data being a computation result of the computation in the first layer; execute computation on a plurality of output data of the first layer according to a predetermined rule, in the computation in the second layer; and acquire second statistical information based on the predetermined rule and the first statistical information, and determine a bit range for limiting a bit width when a plurality of second fixed-point number data, the data being a computation result of the computation in the second layer, are stored in a register, based on the second statistical information.

Application programming interface as a service

An application programming interface (API) as a service is disclosed. In embodiments, a client provides code to be executed along with a configuration file for that code. Based on that, virtual machine(s) and load balancer(s) may be selected, a domain name service configured, and throttling and scaling configured. Through this, an API as a service may be provided on behalf of a client with minimal configuration required by the client or an administrator of a web service platform that provides the API as a service.

TERNARY LOGIC CIRCUIT DEVICE
20220350568 · 2022-11-03 ·

A circuit includes a first full adder, a second full adder, a first half adder, a third full adder configured to receive a sum output signal of the first full adder, a sum output signal of the second full adder, and a sum output signal of the first half adder, a fourth full adder configured to receive a carry output signal of the first full adder, a carry output signal of the second full adder, and a carry output signal of the first half adder, a second half adder configured to receive a carry output signal of the third full adder and a sum output signal of the fourth full adder, and a third half adder configured to receive a carry output signal of the second half adder and a carry output signal of the fourth full adder.

TERNARY LOGIC CIRCUIT DEVICE
20220352893 · 2022-11-03 ·

A circuit includes a plurality of first counting gates, a first ternary half adder (THA) and a second THA that are connected to the plurality of first counting gates, a third THA configured to receive a sum output signal of the first THA and a sum output signal of the second THA, a first ternary sum gate configured to receive a carry output signal of the first THA and a carry output signal of the second THA, and a second ternary sum gate configured to receive a carry output signal of the third THA and an output signal of the first ternary sum gate, wherein the third THA and the second ternary sum gate may be configured to output voltage signals corresponding to a number of drain voltages among input signals applied to the plurality of first counting gates.

Arithmetic device having magnetoresistive effect elements

According to one embodiment, an arithmetic device includes a first computational circuit including a first string, the first string having a first magnetoresistive effect element on a first conducting layer; a second computational circuit including a second strings, the second string having second magnetoresistive effect element on a second conducting layer; a third computational circuit executing computational processing using a first signal from the first computational circuit and a second signal from the second computational circuit; and a control circuit. The control circuit sets a condition on write operations with respect to at least one of the first and second magnetoresistive effect elements, based on information related to write error in at least one of the first and second magnetoresistive effect elements.

Performance benchmarking-based selection of processor for generating graphic primitives

Systems and methods for performance benchmarking-based selection of processor for generating graphic primitives. An example method comprises: initializing, by a computer system comprising a plurality of processors of a plurality of processor types, a current value of a graphic primitive parameter; for each processor type of the plurality of processor types, computing a corresponding value of a performance metric by generating, using at least one processor of a currently selected processor type, a corresponding graphic primitive of a specified graphic primitive type, wherein the graphic primitive is characterized by the current value of the graphic primitive parameter; and estimating, based on the computed performance metric values, a threshold value of the graphic primitive parameter.