Embodiments of a device include an integrated circuit, a reconfigurable stream switch formed in the integrated circuit, and an arithmetic unit coupled to the reconfigurable stream switch. The arithmetic unit has a plurality of inputs and at least one output, and the arithmetic unit is solely dedicated to performance of a plurality of parallel operations. Each one of the plurality of parallel operations carries out a portion of the formula: output=AX+BY+C.

A computing core circuit, including: an encoding module, a route sending module, and a control module, wherein the control module is configured to control the encoding module to perform encoding processing on a pulse sequence determined by pulses to be transmitted of at least one neuron in a current computing core, so as to obtain an encoded pulse sequence, and control the route sending module to determine a corresponding route packet according to the encoded pulse sequence, so as to send the route packet. The present disclosure further provides a data processing method, a chip, a board, an electronic device, and a computer-readable storage medium.

A method of adjusting lighting to reduce sky glow. The method includes the steps of detecting, by a plurality of sensors, an amount of cloud coverage in a region of the troposphere; determining, by a sky glow reduction circuitry, whether the amount of clouds is greater than, less than, or equal to a predetermined cloud coverage threshold; and adjusting, by a light output controller circuitry, a light output of a plurality of light sources to reduce sky glow if the amount of clouds is less than or equal to the predetermined cloud coverage threshold. The adjusting step is at least partially based on a predetermined policy.

A method of adjusting lighting to reduce sky glow. The method includes the steps of detecting, by a plurality of sensors, an amount of cloud coverage in a region of the troposphere; determining, by a sky glow reduction circuitry, whether the amount of clouds is greater than, less than, or equal to a predetermined cloud coverage threshold; and adjusting, by a light output controller circuitry, a light output of a plurality of light sources to reduce sky glow if the amount of clouds is less than or equal to the predetermined cloud coverage threshold. The adjusting step is at least partially based on a predetermined policy.

A sensing device is provided in the present invention. The sensing device includes a first conductive element, a second conductive element, a processing unit, a cover and a base. The processing electrically connects to the first conductive element and the second conductive element. The cover has an opening. The base forms a space with the cover, and the first conductive element and the second conductive element are set on the base.

Computational systems implement problem solving using heuristic solvers or optimizers. Such may iteratively evaluate a result of processing, and modify the problem or representation thereof before repeating processing on the modified problem, until a termination condition is reached. Heuristic solvers or optimizers may execute on one or more digital processors and/or one or more quantum processors. The system may autonomously select between types of hardware devices and/or types of heuristic optimization algorithms. Such may coordinate or at least partially overlap post-processing operations with processing operations, for instance performing post-processing on an ith batch of samples while generating an (i+1)th batch of samples, e.g., so post-processing operation on the ith batch of samples does not extend in time beyond the generation of the (i+1)th batch of samples. Heuristic optimizers selection is based on pre-processing assessment of the problem, e.g., based on features extracted from the problem and for instance, on predicted success.

Computational systems implement problem solving using heuristic solvers or optimizers. Such may iteratively evaluate a result of processing, and modify the problem or representation thereof before repeating processing on the modified problem, until a termination condition is reached. Heuristic solvers or optimizers may execute on one or more digital processors and/or one or more quantum processors. The system may autonomously select between types of hardware devices and/or types of heuristic optimization algorithms. Such may coordinate or at least partially overlap post-processing operations with processing operations, for instance performing post-processing on an ith batch of samples while generating an (i+1)th batch of samples, e.g., so post-processing operation on the ith batch of samples does not extend in time beyond the generation of the (i+1)th batch of samples. Heuristic optimizers selection is based on pre-processing assessment of the problem, e.g., based on features extracted from the problem and for instance, on predicted success.

A device architecture includes a spatially reconfigurable array of processors, such as configurable units of a CGRA, having spare elements, and a parameter store on the device which stores parameters that tag one or more elements as unusable. Technologies are described which change the pattern of placement of configuration data, in dependence on the tagged elements. As a result, a spatially reconfigurable array having unusable elements can be repaired.

Some embodiments provide a neural network inference circuit for executing a neural network that includes multiple layers of computation nodes. At least a subset of the layers include non-convolutional layers. The neural network inference circuit includes multiple cores with memories that store input values for the layers. The cores are grouped into multiple clusters. For each cluster, the neural network inference circuit includes a set of processing circuits for receiving input values from the cores of the cluster and executing the computation nodes of the non-convolutional layers.

Systems and methods for staggering the release of multiple endpoints from a power brake event. A MCU on each riser implements a riser offset delay based on its position in an order in which power is to be released. For a riser with multiple slots, a delay circuit may be connected to one or more slots to provide a unique offset time to delay the release of power supply the slot. In some systems, a baseboard management controller (BMC) identifies endpoints subject to a power brake event during a POST process. Risers and slots that are not subject to a power brake event are identified and not included in the determination of delays or offset times.