G06F9/262

Collaboration service to support cross-process coordination between active instances of a microservice

Techniques are provided for enabling cross-process coordination between multiple instances of given microservice in a cloud computing system. A method includes running a plurality of active instances of a given microservice of a computing system comprising a distributed microservices architecture. A first active instance of the plurality of active instances executes a portion of program code of the given microservice to perform a job. The portion of the program code of the given microservice includes an instance synchronization element which is configured to enable cross-process coordination between the plurality of active instances of the given microservice with the support of a collaboration service. The first active instance utilizes the instance synchronization element to communicate with the collaboration service and cause the collaboration service to execute a process associated with the instance synchronization element to thereby implement the cross-process coordination between the plurality of active instances for executing the job.

SAFETY SUPERVISED GENERAL PURPOSE COMPUTING DEVICES

A computing device including a plurality of sensors, a system-on-module, a safety microcontroller and a plurality of communication interfaces communicatively coupling the system-on-module, the safety microcontroller and the plurality of sensors together. The system-on module can include an integrated interconnection of a plurality of different types of cores and one or more different types of memory. The system-on module can be configured to control operation and or performance of a system. The safety microcontroller can be configured to provide safety supervision of the system-on-module.

Filtering micro-operations for a micro-operation cache in a processor

A processor includes a micro-operation cache having a plurality of micro-operation cache entries for storing micro-operations decoded from instruction groups and a micro-operation filter having a plurality of micro-operation filter table entries for storing identifiers of instruction groups for which the micro-operations are predicted dead on fill if stored in the micro-operation cache. The micro-operation filter receives an identifier for an instruction group. The micro-operation filter then prevents a copy of the micro-operations from the first instruction group from being stored in the micro-operation cache when a micro-operation filter table entry includes an identifier that matches the first identifier.

MULTI-INDEXED MICRO-OPERATIONS CACHE FOR A PROCESSOR
20230305847 · 2023-09-28 ·

Various example embodiments for supporting a multi-indexed micro-operations cache (MI-UC) in a processor are presented. Various example embodiments for supporting an MI-UC in a processor may be configured to support an MI-UC in which, for a UC line of the MI-UC, multiple indexes into the UC line, for multiple sets of micro-operations (UOPs) stored in the UC line based on decoding of multiple instructions, are supported.

Filtering Micro-Operations for a Micro-Operation Cache in a Processor

A processor includes a micro-operation cache having a plurality of micro-operation cache entries for storing micro-operations decoded from instruction groups and a micro-operation filter having a plurality of micro-operation filter table entries for storing identifiers of instruction groups for which the micro-operations are predicted dead on fill if stored in the micro-operation cache. The micro-operation filter receives an identifier for an instruction group. The micro-operation filter then prevents a copy of the micro-operations from the first instruction group from being stored in the micro-operation cache when a micro-operation filter table entry includes an identifier that matches the first identifier.

COLLABORATION SERVICE TO SUPPORT CROSS-PROCESS COORDINATION BETWEEN ACTIVE INSTANCES OF A MICROSERVICE
20210240544 · 2021-08-05 ·

Techniques are provided for enabling cross-process coordination between multiple instances of given microservice in a cloud computing system. A method includes running a plurality of active instances of a given microservice of a computing system comprising a distributed microservices architecture. A first active instance of the plurality of active instances executes a portion of program code of the given microservice to perform a job. The portion of the program code of the given microservice includes an instance synchronization element which is configured to enable cross-process coordination between the plurality of active instances of the given microservice with the support of a collaboration service. The first active instance utilizes the instance synchronization element to communicate with the collaboration service and cause the collaboration service to execute a process associated with the instance synchronization element to thereby implement the cross-process coordination between the plurality of active instances for executing the job.

Safety supervised general purpose computing devices

A computing device including a plurality of sensors, a system-on-module, a safety microcontroller and a plurality of communication interfaces communicatively coupling the system-on-module, the safety microcontroller and the plurality of sensors together. The system-on module can include an integrated interconnection of a plurality of different types of cores and one or more different types of memory. The system-on module can be configured to control operation and or performance of a system. The safety microcontroller can be configured to provide safety supervision of the system-on-module.

Multi-indexed micro-operations cache for a processor

Various example embodiments for supporting a multi-indexed micro-operations cache (MI-UC) in a processor are presented. Various example embodiments for supporting an MI-UC in a processor may be configured to support an MI-UC in which, for a UC line of the MI-UC, multiple indexes into the UC line, for multiple sets of micro-operations (UOPs) stored in the UC line based on decoding of multiple instructions, are supported.