A system and method for virtual processor customization based upon the particular workload placed upon the virtual processor by one or more execution contexts within a given program or process. The customization serves to optimize the virtual processor architecture based upon a determination as to the size and/or type or virtual execution registers optimally suited for supporting a given execution context. This results in a time-variant processor architecture which not only provides optimized computational attributes, but also affords a high degree of inherent process security.

Different processor architectures are described to evaluate and track dependencies required by instructions. The processors may hold or queue instructions that require output of other instructions until required data and resources are available which may remove the requirement of NOPs in the instruction memory to resolve dependencies and pipeline hazards. The processor may divide instruction data into bundles for parallel execution and provide speculative execution. The processor may include various components to implement an evaluation unit, execution unit and termination unit.

A save and restore (SR) register system is disclosed. Some embodiments include a first memory state element (MSE), a second MSE, and a control circuit. The first MSE is configured to: clock in a first data value during a normal mode and hold the first data value during a first testing mode; and clock in a first test sequence during a second testing mode. The second MSE is configured to: clock in the first data value during the normal mode; and clock in a second test sequence during the first testing mode. The control circuit configured to: restore the second MSE to the first data value based on an output port of the first MSE after the second MSE clocks in the second test sequence; and restore the first MSE based on an output port of the second MSE after the first MSE clocks in the first test sequence.

Aspects of the invention include receiving, by a processor, a plurality of instructions at an instruction pipeline. The processor can further determine an operand bit field size for each of the received plurality of instructions. The processor can further compare the operand bit field size of at least a subset of the received instructions to a predetermined threshold. The processor can further fuse at least two of the received instructions that have an operand bit field size that meets the predetermined threshold. The processor can further perform an execution stage within the instruction pipeline to execute the received instructions, including the fused instructions.

Techniques facilitating compliance aware service registry and load balancing are provided. A system can comprise a memory that stores computer executable components and a processor that executes computer executable components stored in the memory. The computer executable components can comprise an extraction component that removes a service from a load balancer ring based on a first determination by a verification component that a compliance state of the service is a non-compliant state. Further, the computer executable components can comprise an insertion component that adds the service to the load balancer ring based on a second determination by the verification component that, after a defined amount of time, the compliance state of the service is a compliant state.

The subject disclosure is directed towards projecting light in a pattern in which the pattern contains components (e.g., spots) having different intensities. The pattern may be based upon a grid of initial points associated with first intensities and points between the initial points with second intensities, and so on. The pattern may be rotated relative to cameras that capture the pattern, with captured images used active depth sensing based upon stereo matching of dots in stereo images.

Systems and methods for stereo matching based upon active illumination using a patch in a non-actively illuminated image to obtain weights that are used in patch similarity determinations in actively illuminated stereo images is provided. To correlate pixels in actively illuminated stereo images, adaptive support weights computations are used to determine similarity of patches corresponding to the pixels. In order to obtain adaptive support weights for the adaptive support weights computations, weights are obtained by processing a non-actively illuminated (clean) image.

A data processing method includes obtaining N pieces of data at a time from data to be processed, determining first valid data from the N pieces of data, writing the first valid data into a storage device, and reading second valid data at a time from the storage device. N is an integer larger than or equal to 2. A number of pieces of data of the first valid data is larger than or equal to 0 and smaller than or equal to N. A number of pieces of data of the second valid data is K, and K is an integer larger than or equal to 1 and smaller than N.

An information processing apparatus includes a first integrated circuit and a second integrated circuit. The first integrated circuit includes a first controller which processes data obtained from a device and which controls operations of the device. The second integrated circuit includes a second controller whose data processing speed is faster than the data processing speed of the first controller. When the second controller performs a second process with greater priority than a first process after start of the first process and before completion of the first process, the second controller determines whether or not the first controller is to restart the first process on the basis of a condition defined as to data subjected to the first process.

The subject disclosure is directed towards active depth sensing based upon moving a projector or projector component to project a moving light pattern into a scene. Via the moving light pattern captured over a set of frames, e.g., by a stereo camera system, and estimating light intensity at sub-pixel locations in each stereo frame, higher resolution depth information at a sub-pixel level may be computed than is captured by the native camera resolution.