G06F9/4411

Handling an input/output store instruction

An input/output store instruction is handled. A data processing system includes a system nest coupled to at least one input/output bus by an input/output bus controller. The data processing system further includes at least a data processing unit including a core, system firmware and an asynchronous core-nest interface. The data processing unit is coupled to the system nest via an aggregation buffer. The system nest is configured to asynchronously load from and/or store data to at least one external device which is coupled to the at least one input/output bus. The data processing unit is configured to complete the input/output store instruction before an execution of the input/output store instruction in the system nest is completed. The asynchronous core-nest interface includes an input/output status array with multiple input/output status buffers.

Data storage device restoring method
11579977 · 2023-02-14 · ·

A data storage device restoring method is provided, which is adapted to a data storage device. The data storage device includes an SSD controller, a power management circuit, a non-volatile memory, and a reset circuit. The data storage device restoring method includes: the power management circuit determines whether a normal signal from the SSD controller is received within a predetermined time; if not, the power management circuit resupplies power to the data storage device but stops supplying power to the non-volatile memory, thereby the SSD controller stays in a read-only memory mode to automatically execute the data storage device restoring process.

Deterministic dynamic reconfiguration of interconnects within programmable network-based devices

A device includes a plurality of reconfigurable resources, a bus, and a configurator. The bus interconnects the plurality of reconfigurable resources. The configurator is configured to deterministically compute a segmented interconnect configuration for the bus based on operational parameters associated with the device and operational constraints associated with program modules to be executed by the plurality of reconfigurable resources.

Keyboard emulation

Examples associated with keyboard emulation are described. One example system includes an input/output controller. The system also includes a remote signal receiver. A control module receives a first signal via the remote signal receiver. Based on the first signal, the control module communicates with the input/output controller to emulate a keyboard input.

Systems and methods for separate storage and use of system BIOS components

Systems and methods are provided for supporting use of system BIOS components (e.g., such as BIOS debug messages, debugger firmware, UEFI drivers, etc.) that are stored separately from the remainder of system BIOS firmware for an information handling system. The system BIOS components may represent only a portion of the total BIOS firmware, and may be selectively retrieved and loaded from the separate storage into system memory when needed by the system BIOS for operating purposes (e.g., such as debugging operations).

Method, device, and storage medium for processing driver on terminal device side

Method, device, and storage medium for processing a driver on a terminal device side are provided. A method includes obtaining connection information between a peripheral device corresponding to the driver and a terminal device; determining, according to the connection information, driver installation options capable of successfully installing the driver; and displaying the driver installation options capable of successfully installing the driver.

IMPLEMENTING EXTERNAL MEMORY TRAINING AT RUNTIME
20230041115 · 2023-02-09 ·

Systems, apparatuses and methods may provide for technology that initializes an integrated memory of a processor during a boot sequence and conducts a runtime initialization of an external system memory associated with the processor. The technology may also bypass the runtime initialization of the external system memory during the boot sequence.

Selective enhancement of interactive configuration interfaces

A method for selectively generating suggested default values for I/O configurations is provided. The method identifies a first selection including a first input value for an I/O configuration. The method determines a set of remaining input options based on the first selection. The method accesses a set of decision trees based on the set of remaining input options and selects a decision tree of the set of decision trees based on the first input value. The method generates a suggested value for a subsequent selection for the I/O configuration and causes presentation of the suggested value and a user interface element representing the subsequent selection.

Electronic device and method for setting at least one specified pin read during booting stage when configurating a display panel dynamically
11556350 · 2023-01-17 · ·

A method for setting a display panel dynamically and an electronic device are provided. In a booting stage of the electronic device, a display driver is executed, wherein a motherboard of the electronic device includes at least one specified pin, a storage device and a processor. A predetermined pin value is set in the at least one specified pin and read from the at least one specified pin of the motherboard through the display driver. A database is queried through the display driver and includes multiple reference pin values corresponding to multiple sets of parameter values. The set of parameter values corresponding to the predetermined pin value is obtained according to the reference pin values; and the display panel is initialized through the display driver using the set of parameter values corresponding to the predetermined pin value.

ARITHMETIC PROCESSING DEVICE AND ARITHMETIC PROCESSING METHOD
20230010536 · 2023-01-12 · ·

An arithmetic processing device includes: a memory; and a processor coupled to the memory and configured to: execute a plurality of data processes each of which is divided into a plurality of pipeline stages in parallel at different timings; measure a processing time of each of the plurality of pipeline stages; and set a priority of the plurality of pipeline stages in a descending order of the measured processing time.