Patent classifications
G06F9/4418
SYSTEM ON CHIP FOR REDUCING WAKE-UP TIME, METHOD OF OPERATING SAME, AND COMPUTER SYSTEM INCLUDING SAME
A system on chip (SoC) includes an internal read-only memory (ROM) configured to store a first boot loader; a first internal static random access memory (SRAM) configured to receive a second boot loader output from a booting device, store the second boot loader, and perform a booting sequence according to control of the first boot loader; a second internal SRAM configured to receive a third boot loader output from the booting device, store the third boot loader, and perform a wake-up sequence according to control of the first boot loader; and a dynamic random access memory (DRAM) controller configured to load an operating system (OS) from the booting device into a DRAM according to control of the second boot loader.
SYSTEM AND METHOD FOR PROVIDING SYSTEM LEVEL SLEEP STATE POWER SAVINGS
A system for providing system level sleep state power savings includes a plurality of memory channels and corresponding plurality of memories coupled to respective memory channels. The system includes one or more processors operative to receive information indicating that a system level sleep state is to be entered and in response to receiving the system level sleep indication, moves data stored in at least a first of the plurality of memories to at least a second of the plurality of memories. In some implementations, in response to moving the data to the second memory, the processor causes power management logic to shut off power to: at least the first memory, to a corresponding first physical layer device operatively coupled to the first memory and to a first memory controller operatively coupled to the first memory and place the second memory in a self-refresh mode of operation.
Method for operating a user terminal of an agricultural machine and agricultural machine
The present disclosure refers to a method for operating a user terminal (7) of an agricultural machine, comprising providing a user terminal (7) in a control system (3) of an agricultural machine, the user terminal (7) connected to a power supply and configured to transmit, through a control bus (6), control signals to functional elements (10a; 10b) of the agricultural machine; enabling operation of the user terminal (7), after a period of time the user terminal was turned-off before, comprising enabling a user control mode of operation of the user terminal (7); running software applications in the user terminal (7); enabling a display device of the user terminal (7); and enabling the control bus (6), thereby, operating the control bus (6) in a bus control mode allowing for transmission of the control signals through the control bus (6); controlling operation of one of the functional elements (10a; 10b) of the agricultural machine in the user control mode of operation; in response to a user input, generating present control signals; transmitting the present control signals to the control unit assigned to the one of the functional elements (10a; 10b) through the control bus (6); and operating the functional elements (10a; 10b) according to the present control signals; disabling the user control mode of operation and enabling a standby mode of operation for the user terminal (7), comprising continuing with running one or all of the software applications in the user terminal (7); disabling the display device of the user terminal (7); and disabling the control bus (6); and re-enabling the control mode of operation for the user terminal (7). Further, an agricultural machine is provided.
DEVICE SUSPEND METHOD AND COMPUTING DEVICE
A device suspension method and a computing device are provided. In the method, before a device enters a suspended state, memory space occupied by a background process that is unrelated to a foreground process is released. In this way, the background process unrelated to the foreground process is not saved in a memory of the device. In other words, it reduces data stored in the memory when the device is suspended. Therefore, when the device needs to be woken up, only a relatively small amount of data needs to be read from the memory, and a working state can be rapidly restored. This can reduce a delay of reading data from the memory when the device is woken up, thereby accelerating a wakeup speed of the device. In addition, the data is stored in the memory when the device is suspended.
EtherCAT Device
An EtherCAT device is disclosed. The EtherCAT device comprises a data input port to receive a signal representing data, the signal representing one of a plurality of possible logical values; and a degradation calculation circuit. The degradation calculation circuit is to read, demodulate, and convert the received signal into a digital domain representation; process the digital domain representation into slices, where the value of the received signal at a respective time is represented in a respective one of the slices; determine differences between the respective slices and reference slices; identify an intended logical value of the received signal responsive to the determined differences; determine a quantification of error at the respective time responsive to the identified logical value and the determined differences; and determine a signal quality index responsive to the determined quantification of error.
Information processing apparatus control method therefor and storage medium
An information processing apparatus to which an external device is attachable includes an initialization unit configured to, when the information processing apparatus is activated from a power-off state, execute initialization of the external device, and not to, when the information processing apparatus is returned from a power-saving state, execute the initialization of the external device.
WAKING DEVICE AND METHOD FOR WAKING AN ELECTRONIC DEVICE
A. waking device is used for waking an electronic device. The waking device includes an infrared sensor and a radar sensor. The infrared sensor continuously measures an energy value in a detection area. When the infrared sensor detects an energy variation, the infrared sensor sends a trigger signal. The radar sensor is electrically connected to the infrared sensor and the electronic device. After the radar sensor receives the trigger signal, the radar sensor switches from a sleep mode to an operating mode. Furthermore, when the radar sensor determines that there is a moving object in the detection area, the radar sensor sends a wake-up signal to the electronic device.
Embedded computing device
According to an example aspect of the present invention, there is provided an apparatus comprising a first processing core configured to generate first control signals and to control a display by providing the first control signals to the display via a first display interface, a second processing core configured to generate second control signals and to control the display by providing the second control signals to the display via a second display interface, and the first processing core being further configured to cause the second processing core to enter and leave a hibernation state based at least partly on a determination, by the first processing core, concerning an instruction from outside the apparatus.
Perceptible indicators of wires being attached correctly to controller
Tools and techniques are described to automate line testing when wiring devices (such as equipment and sensors) to controllers. Controllers have access to databases of the devices that are controlled by them, including wiring diagrams and protocols, such that the controller can automatically check that each wire responds correctly to stimulus from the controller. After testing, a reporting device rapidly shows the results of the line testing.
FUNCTION EXECUTION IN SYSTEM MANAGEMENT MODES
In some examples, executable code causes a processor to execute a first function and enter a system management mode responsive to receipt of a first system management interrupt during the execution of the first function. The executable code causes the processor to pause execution of the first function, save a state of the processor in the system management mode, and exit the system management mode. The executable code causes the processor to execute a second function identified by the first system management interrupt and receive a second system management interrupt to enter the system management mode. The executable code causes the processor to restore the state of the processor in the system management mode and exit the system management mode. The executable code causes the processor to resume execution of the first function after exiting the system management mode.