G06F9/44589

Implementation for a heterogeneous device

Implementing a design for a heterogeneous device can include mapping, using computer hardware, a plurality of applications of a design for a device to a plurality of domains of the device, wherein each domain includes a different compute unit, performing, using the computer hardware, validity checking on the plurality of applications, detecting, using the computer hardware, a conflict between two or more of the plurality of applications from the validity checking, and, in response to the detecting, generating a notification of the conflict using the computer hardware. Operations such as automatically generating a boot image, debugging, and/or performing system level performance analysis may also be performed.

Container management system with a remote sharing manager

Methods, systems, and computer storage media for providing a set of common flat files in a composite image that can be mounted as a container (i.e. composite container) to support isolation and interoperation of computing resources. Container management is provided for a container management system based on a composite image file system engine that executes composite operations. In particular, a remote sharing manager operates with a composite engine interface to support generating composite images configured for split layer memory sharing, split layer direct access memory sharing, and dynamic base images. In operation, a plurality of files and a selection of a remote sharing configuration for generating a composite image are accessed. The composite image for the plurality of files and the remoting sharing configuration is generated. The composite image is communicated to cause sharing of the composite image, sharing of the composite image is based on the remote sharing configuration.

Information processing system, information processing device, storage medium, and information processing method of detecting destruction of data due to file transfer
11537308 · 2022-12-27 · ·

An information processing device, includes a memory; and a processor coupled to the memory and configured to: generate second data by adding, to first data including a machine language, first machine language data that may be destroyed at a time of transfer of the first data and second machine language data that is not destroyed at the time of the transfer, and transmit the second data.

Method and system for executing applications using native code modules

Some embodiments provide a system that executes a web application. During operation, the system loads the web application in a web browser and loads a native code module associated with the web application into a secure runtime environment. Next, the system provides input data associated with the web application to the native code module and processes the input data using the native code module to obtain output data. Finally, the system provides the output data to the web application for use by the web application.

Adapting pre-compiled eBPF programs at runtime for the host kernel by offset inference

An approach is provided in which a method, system, and computer program product load a first program and a second program on a target host that includes a host kernel. The first program and the second program are both pre-compiled on a build system that is different from the target host. The method, system, and computer program product execute at least a subset of the first program on the host kernel and the subset of the first program captures a set of kernel structure information from the host kernel. The method, system, and program product load, at the target host, the set of kernel structure information into the second program at one or more placeholder locations. Then, the method, system and program product execute at least a subset of the second program with the set of kernel structure information on the target kernel.

Electronic device for updating on-board data of power off status and electronic device package assembly

An electronic device for updating on-board data of power off status is provided, which combines a rewritable memory, an embedded controller, and a second network socket onto a motherboard. The rewritable memory includes a target storage area. The embedded controller includes a second network interface electrically connected to the second network socket, for receiving a writing command and a binary file. After receiving power of a standby mode, the embedded controller executes a data writing program to receive the writing command and the binary file via the second network socket and the second network interface, and writes the binary data file into the target storage area of the rewritable memory by using the data writing program.

COMPILER ADD-ON FOR CODE, DATA AND EXECUTION FLOWS ATTESTATION IN A SECURE COMPUTING SYSTEM
20230090165 · 2023-03-23 · ·

A method and system for execution of a compiler add-on for securing code are provided. The method includes receiving from a compiler a code in machine language; generating at least one validator code for protection of the received code; generating at least one execution proof for protection of at least one execution flow of the received code; embedding the at least validator code and at least one execution proof into the received code to create a protected code; and storing the protected code in a storage.

METHOD AND SYSTEM FOR FUNCTION CALL AND VARIABLE ACCESS BASED RELAXED BACKWARD SLICING

This disclosure relates generally to the field of program slicing, and, more particularly, to a method and system for function call and variable access based relaxed backward slicing. The method discloses a slicing criterion which focuses only on functions called from an entry function. The slicing criteria uses control and data flow information to slice the given entry function with respect to functions called from the body of the entry function and eventually remove all functions not called directly or indirectly from the entry function. The variables modified by calls in the entry function are considered through side-effect while identifying control and data dependence chain within body of entry function. The proposed technique identifies partitions of functions based on the variables accessible in and functions called from the entry function. Thus, unrelated sets of functions with respect to the entry function are computed and divided into different partitions.

SECURE DEVSECOPS PIPELINE WITH TASK SIGNING
20220342679 · 2022-10-27 ·

An approach is disclosed that selects a current processing element from a set of processing elements included in a software pipeline. A selected input data to the current processing element was an output data from a previously executed processing element. The input data is verified by computing a current fingerprint of the selected input data and comparing the computed fingerprint to an expected fingerprint. The expected fingerprint was previously computed after the output data was generated by the previously executed processing element. In response to the comparing revealing that the current fingerprint fails to match the expected fingerprint, a verification error is indicated to a user of the process.

Code update in system management mode

A computing device is provided, including memory storing an instruction storage location. The computing device may further include a processor system including a plurality of processor threads. The processor system may suspend execution of one or more respective processor threads of the plurality of processor threads. The processor system may store one or more respective processor thread contexts of the one or more processor threads in the memory. The processor system may enter a system management mode (SMM). The processor system may determine that the instruction storage location includes a code update instruction. The processor system may perform a code update based on the code update instruction. The processor system may exit the SMM. The processor system may retrieve the one or more processor thread contexts from the memory and resume execution of the one or more processor threads without rebooting the computing device.