A method includes generating a calibration signal by a clock generator, feeding the calibration signal to a first filter through a first switch unit, comparing an output of the first filter with the calibration signal through a frequency detector and a phase comparator and generating a first updated bandwidth code to adjust a bandwidth frequency of the first filter.

The inventive disclosures described herein generally pertain to an improved runtime-calibratable analog-computing system. In many embodiments, the improved analog-computing system comprises at least two analog computers, wherein after initial calibration, the system is designed to stagger the runtime calibration modes of each of the at least two analog-computers such that at least one of the analog computers is always in service, thus preventing any downtime for the overall system. In other words, a system user sees one initial calibration, and computing by the overall system is never interrupted.

The inventive disclosures described herein generally pertain to an improved runtime-calibratable analog-computing system. In many embodiments, the improved analog-computing system comprises at least two analog computers, wherein after initial calibration, the system is designed to stagger the runtime calibration modes of each of the at least two analog-computers such that at least one of the analog computers is always in service, thus preventing any downtime for the overall system. In other words, a system user sees one initial calibration, and computing by the overall system is never interrupted.

A high voltage inductive adder is disclosed. In some embodiments, the high voltage inductive adder comprising a first adder circuit and a second adder circuit. The first adder circuit including a first source; a first switch electrically coupled with the first source; a first transformer core; and a first plurality of primary windings wound about the first transformer core and electrically coupled with the first switch. The second adder circuit including a second source; a second switch electrically coupled with the second source; a second transformer core; and a second plurality of primary windings wound about the second transformer core and electrically coupled with the second switch. The high voltage inductive adder comprising one or more secondary windings wound around both the first transformer core and the second transformer core and an output coupled with the plurality of secondary windings.

A high voltage inductive adder is disclosed. In some embodiments, the high voltage inductive adder comprising a first adder circuit and a second adder circuit. The first adder circuit including a first source; a first switch electrically coupled with the first source; a first transformer core; and a first plurality of primary windings wound about the first transformer core and electrically coupled with the first switch. The second adder circuit including a second source; a second switch electrically coupled with the second source; a second transformer core; and a second plurality of primary windings wound about the second transformer core and electrically coupled with the second switch. The high voltage inductive adder comprising one or more secondary windings wound around both the first transformer core and the second transformer core and an output coupled with the plurality of secondary windings.

A high voltage inductive adder is disclosed. In some embodiments, the high voltage inductive adder comprising a first adder circuit and a second adder circuit. The first adder circuit including a first source; a first switch electrically coupled with the first source; a first transformer core; and a first plurality of primary windings wound about the first transformer core and electrically coupled with the first switch. The second adder circuit including a second source; a second switch electrically coupled with the second source; a second transformer core; and a second plurality of primary windings wound about the second transformer core and electrically coupled with the second switch. The high voltage inductive adder comprising one or more secondary windings wound around both the first transformer core and the second transformer core and an output coupled with the plurality of secondary windings.

A high voltage inductive adder is disclosed. In some embodiments, the high voltage inductive adder comprising a first adder circuit and a second adder circuit. The first adder circuit including a first source; a first switch electrically coupled with the first source; a first transformer core; and a first plurality of primary windings wound about the first transformer core and electrically coupled with the first switch. The second adder circuit including a second source; a second switch electrically coupled with the second source; a second transformer core; and a second plurality of primary windings wound about the second transformer core and electrically coupled with the second switch. The high voltage inductive adder comprising one or more secondary windings wound around both the first transformer core and the second transformer core and an output coupled with the plurality of secondary windings.

A high voltage inductive adder is disclosed. In some embodiments, the high voltage inductive adder comprising a first adder circuit and a second adder circuit. The first adder circuit including a first source; a first switch electrically coupled with the first source; a first transformer core; and a first plurality of primary windings wound about the first transformer core and electrically coupled with the first switch. The second adder circuit including a second source; a second switch electrically coupled with the second source; a second transformer core; and a second plurality of primary windings wound about the second transformer core and electrically coupled with the second switch. The high voltage inductive adder comprising one or more secondary windings wound around both the first transformer core and the second transformer core and an output coupled with the plurality of secondary windings.

A high voltage inductive adder is disclosed. In some embodiments, the high voltage inductive adder comprising a first adder circuit and a second adder circuit. The first adder circuit including a first source; a first switch electrically coupled with the first source; a first transformer core; and a first plurality of primary windings wound about the first transformer core and electrically coupled with the first switch. The second adder circuit including a second source; a second switch electrically coupled with the second source; a second transformer core; and a second plurality of primary windings wound about the second transformer core and electrically coupled with the second switch. The high voltage inductive adder comprising one or more secondary windings wound around both the first transformer core and the second transformer core and an output coupled with the plurality of secondary windings.

A delay line is constructed by combining a phase generator and a fabric. The phase generator splits a digital input signal in multiple incrementally delayed versions, which are input to the fabric. The fabric has an array of node filters. Inputs of filters in the first array column are inputs of the fabric. A node filter has a delay element and a cross-coupling element, whose output signals are added or subtracted to form a filter output signal. A node filter in a row is concatenated to the previous filter in the row through its delay element. Inputs of cross-coupling elements are connected to other array rows. Outputs of node filters form the outputs of the fabric. Delay times of delay elements and cross-coupling elements are nominally equal. Drive strengths of cross-coupling elements may be lower than drive strengths of delay elements.