A power failure monitoring method applied to a programmable logic device includes outputting a power supply enable signal to instruct a power supply to power on, starting a counter, determining whether a first abnormal power status indication signal exists for each power supply before a current reading of the counter reaches a preset value, and in response that the first abnormal power status indication signal exists, outputting a first read notification signal according to the first abnormal power status indication signal, so that a baseboard management controller reads the first abnormal power supply status indication signal according to the first read notification signal and generates a corresponding power status log.

A power failure monitoring method applied to a programmable logic device includes outputting a power supply enable signal to instruct a power supply to power on, starting a counter, determining whether a first abnormal power status indication signal exists for each power supply before a current reading of the counter reaches a preset value, and in response that the first abnormal power status indication signal exists, outputting a first read notification signal according to the first abnormal power status indication signal, so that a baseboard management controller reads the first abnormal power supply status indication signal according to the first read notification signal and generates a corresponding power status log.

A power failure monitoring device includes an electronic device and a console; the electronic device includes a main board; the console is coupled to the main board and adapted to obtain power failure information in the electronic device, and then analyze a power supply condition of the electronic device according to the obtained power failure information.

A power failure monitoring device includes an electronic device and a console; the electronic device includes a main board; the console is coupled to the main board and adapted to obtain power failure information in the electronic device, and then analyze a power supply condition of the electronic device according to the obtained power failure information.

A power failure monitoring method applied to a programmable logic device includes outputting a power supply enable signal to instruct a power supply to power on, starting a counter, determining whether a first abnormal power status indication signal exists for each power supply before a current reading of the counter reaches a preset value, and in response that the first abnormal power status indication signal exists, outputting a first read notification signal according to the first abnormal power status indication signal, so that a baseboard management controller reads the first abnormal power supply status indication signal according to the first read notification signal and generates a corresponding power status log.

Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.