Methods are provided for testing and hardening software applications for the carrying out digital transactions which comprise a white-box implementation of a cryptographic algorithm. The method comprises the following steps: (a) feeding one plaintext of a plurality of plaintexts to the white-box implementation; (b) reading out and storing the contents of the at least one register of the processor stepwise while processing the machine commands of the white-box implementation stepwise; (c) repeating the steps (a) and (b) with a further plaintext of the plurality of plaintexts N-times; and (d) statistically evaluating the contents of the registers and the plaintexts, the intermediate results and/or the ciphertexts generated from the plaintexts by searching for correlations between the contents of the registers and the plaintexts, the intermediate results and/or the ciphertexts generated from the plaintexts to establish the secret key.

There is disclosed a method for encrypting data representing a rendering task, the method comprising segmenting the data to form multiple variably sized segments, wherein each segment comprises a payload, and a footer portion comprising at least a footer size section indicating the size of a footer encoding the size of a subsequent segment, and encrypting each segment using data associated with that segment and the rendering task.

There is disclosed a method for encrypting data representing a rendering task, the method comprising segmenting the data to form multiple variably sized segments, wherein each segment comprises a payload, and a footer portion comprising at least a footer size section indicating the size of a footer encoding the size of a subsequent segment, and encrypting each segment using data associated with that segment and the rendering task.

A method for dynamic license plate renumbering includes: identifying, by a processing device of a processing server, a new plate number for a dynamic license plate; storing, by the processing server, the identified new plate number in a data entry with a vehicle identifier associated with the dynamic license plate; transmitting, by a transmitter of the processing server, the identified new plate number to the dynamic license plate; and displaying, on a display device of the dynamic license plate, the new plate number.

A similarity calculation system calculating a distance between a first vector stored in a similarity calculation apparatus and a second vector entered from an input terminal wherein the similarity calculation apparatus transmits to the input terminal a ciphertext of each element of the first vector and a weighted distance table with respect to combinations of possible values of the elements of the first vector and the second vector, and the input terminal refers to the weighted distance table to calculate a ciphertext of element distances for all combinations of the value of a single element of the second vector and possible values of elements of the first vector, calculates the ciphertexts of the sum of the element distances for each element of the second vector using additive homomorphic encryption, and transmits the ciphertext of the sum to the similarity calculation apparatus.

A similarity calculation system calculating a distance between a first vector stored in a similarity calculation apparatus and a second vector entered from an input terminal wherein the similarity calculation apparatus transmits to the input terminal a ciphertext of each element of the first vector and a weighted distance table with respect to combinations of possible values of the elements of the first vector and the second vector, and the input terminal refers to the weighted distance table to calculate a ciphertext of element distances for all combinations of the value of a single element of the second vector and possible values of elements of the first vector, calculates the ciphertexts of the sum of the element distances for each element of the second vector using additive homomorphic encryption, and transmits the ciphertext of the sum to the similarity calculation apparatus.

The invention provides a processor device having an executable, white-box-masked implementation of a cryptographic algorithm implemented thereon. The white-box masking comprises an affine mapping A, which is so designed that every bit in the output values w of the affine mapping A depends on at least one bit of the obfuscation values y, thereby attaining that the output values w of the affine mapping A are statistically balanced.

The invention provides a processor device having an executable, white-box-masked implementation of a cryptographic algorithm implemented thereon. The white-box masking comprises an affine mapping A, which is so designed that every bit in the output values w of the affine mapping A depends on at least one bit of the obfuscation values y, thereby attaining that the output values w of the affine mapping A are statistically balanced.

A protected circuit includes a logic circuit having one or more input nodes and one or more output nodes. The logic circuit has a network of logic elements and one or more logic encryption elements. A logic encryption element includes a memory cell, such as a correlated electron switch for example, coupled with a configurable sub-circuit that is configured by a value stored in the memory cell to encrypt a signal or a signal path. A mapping of values at the one or more input nodes to values at the one or more output nodes corresponds to a desired mapping when values stored in the one or more memory cells match component values of a prescribed key vector. The memory cells may be programmed after fabrication of the circuit.

A protected circuit includes a logic circuit having one or more input nodes and one or more output nodes. The logic circuit has a network of logic elements and one or more logic encryption elements. A logic encryption element includes a memory cell, such as a correlated electron switch for example, coupled with a configurable sub-circuit that is configured by a value stored in the memory cell to encrypt a signal or a signal path. A mapping of values at the one or more input nodes to values at the one or more output nodes corresponds to a desired mapping when values stored in the one or more memory cells match component values of a prescribed key vector. The memory cells may be programmed after fabrication of the circuit.