The present disclosure relates to a display device. A display device according to an embodiment of the present inventive concept includes gate lines extending along a first direction, data lines extending along a second direction, pixels including pixel electrodes, each of the pixels including a transistor connected to a gate line and a data line, and a pixel electrode connected to the transistor, the pixels including a first pixel which includes a first pixel electrode connected to a first data line and is disposed in n.sup.th pixel row and m.sup.th pixel column, and a second pixel which includes a second pixel electrode connected to the first data line or a second data line disposed adjacent to the first data line and is disposed in (n+1).sup.th pixel row and the m.sup.th pixel column. The first data line does not overlap the first pixel electrode and overlaps the second pixel electrode.

A display device includes: a first pixel including a first sub-pixel, a second sub-pixel, and a third sub-pixel; and a second pixel including the first sub-pixel, the second sub-pixel, and a fourth sub-pixel. The first pixel and the second pixel are alternately arranged in a row direction and a column direction. The third sub-pixel and the fourth sub-pixel are alternately arranged in the column direction. A branch electrode in one of two first sub-pixels adjacent in the column direction extends in a first direction, and a branch electrode in the other thereof extends in a second direction. A branch electrode in one of two second sub-pixels adjacent in the column direction extends in the first direction, and a branch electrode in the other thereof extends in the second direction. Each branch electrode in the third sub-pixel and the fourth sub-pixel includes a bending portion.

A display device with a switchable viewing angle includes a timing controller to generate an image data, a data control signal, and a gate control signal, a data driver to generate a data signal using the image data and the data control signal, a gate driver to generate a gate signal and first to third emission signals using the gate control signal, and a display panel including a plurality of subpixels to display an image using the data signal, the gate signal, and the first to third emission signals. The gate driver includes a gate signal generator to generate the gate signal, first emission signal generator to generate the first emission signal, and second and third emission signal generators to generate the second and third emission signals, respectively, using input and output signals of the gate signal generator and input and output signals of the first emission signal generator.

The present application discloses a driving circuit, a driving method, and a display panel. The driving circuit includes: a plurality of pixels, each pixel including a first sub-pixel and a second sub-pixel; and a switching circuit, configured to communicate one or both of the first sub-pixel and the second sub-pixel with a scan line and a data line.

The present disclosure provides a driving method of a display module, a driving system thereof, and a display device. The driving method of the display module includes a display panel driving process, and a backlight module driving process driven synchronously with the display panel driving process. The display panel driving process includes steps: performing a color saturation adjustment; and obtaining second color signals to drive the display panel by converting. The backlight module driving process includes steps: using the light source adjustment coefficient to adjust a first brightness value to obtain a second brightness value; determining a dominant hue light source; and driving the dominant hue light source by the second brightness value.

A display compensation method and device, and a display panel are disclosed. The display panel includes a plurality of pixel units each including a plurality of subpixels. The display compensation method includes obtaining original grayscale values of sub-images included in a pending image corresponding to the pixel units, and determining the sub-images whose original grayscale value is less than or equal to a grayscale threshold value as a target sub-image. The target sub-image is displayed through each of the subpixels of a target pixel unit corresponding to the target sub-image, and each of the subpixels of the target pixel unit has a grayscale value equal to a grayscale value of the target sub-image.

A pixel drive circuit and a display panel are provided. According to the pixel drive circuit, a first data line and a first sharing line form a first sub pixel area, a second data line and a second sharing line form a second sub pixel area, and a third data line and a third sharing line form a third sub pixel area. The first sub pixel area, the second sub pixel area and the third sub pixel area share one scan line. The first sharing line of the first sub pixel area is connected in series with the third sharing line of the third sub pixel area.

The present application discloses a display panel and a display apparatus. The display panel includes: a first substrate, pixels, data lines, and scan lines. The pixels include first pixels and second pixels. The first pixels each include a first primary pixel and first secondary pixel, and the second pixels each include a second primary pixel and a second secondary pixel. The first primary pixel and the first secondary pixel are connected to an n.sup.th row of scan line and an n.sup.th row of data line, and the second primary pixel and the second secondary pixel are connected to the n.sup.th row of scan line and the n.sup.th row of data line. The first secondary pixel is connected to a first pull-down circuit, and the second secondary pixel is connected to a second pull-down circuit.

Disclosed are a display panel, a method of controlling the display panel. The display panel includes multiple pixel groups arranged in an array, wherein each pixel group comprises a first sub-pixel and a second sub-pixel which are adjacently arranged; a plurality of gate lines, wherein the first sub-pixel and the second sub-pixel in a same row of the array are connected to one gate line; a plurality of first data lines, wherein the first sub-pixels in a same column of the array are connected to one first data line; a plurality of second data lines. The second sub-pixels in a same column of the array are connected to one second data line of the plurality of second data lines; the first and the second data lines are spacedly arranged, and a driving component to which the gate lines, the first data lines and the second data lines are connected.

A liquid crystal display apparatus switches modes from a normal display mode to a stop preparation mode when a main power source voltage drops. In the display mode, a gate drive circuit sequentially applies a first gate-on pulse to gate bus lines so as to select pixel rows sequentially, and applies a second gate-on pulse to buffer capacitor scanning lines, each of which is associated with a pixel row selected by the first gate-on pulse, during a period that does not overlap a period during which the first gate-on pulse is applied, and a source drive circuit applies a display signal voltage to source bus lines. In the stop preparation mode, the gate drive circuit sequentially applies the first gate-on pulse to the gate bus lines so as to select the pixel rows sequentially, and applies the second gate-on pulse to the buffer capacitor scanning lines, each of which is associated with the pixel row selected by the first gate-on pulse, during a period that at least partially overlaps a period during which the first gate-on pulse is applied, and the source drive circuit applies 0 V to the source bus lines.