G09G2300/08

Method of integrating functional tuning materials with micro devices and structures thereof
11581373 · 2023-02-14 · ·

The disclosure is related to creating different functional micro devices by integrating functional tuning materials and creating an encapsulation capsule to protect these materials. Various embodiments of the present disclosure also related to improve light extraction efficiencies of micro devices by mounting micro devices at a proximity of a corner of a pixel active area and arranging QD films with optical layers in a micro device structure.

Circuit for detecting crack in display and electronic device including same

Disclosed is a portable communication device including a cover window, a display panel including an active area and an inactive area substantially surrounding the active area, the active area including a plurality of pixels and the inactive area including no pixels, a flexible substrate including a first portion connected with the display panel, and a second portion extended from the first portion and bent below a rear surface of the display panel; a display driver integrated circuit (DDI) disposed in the second portion of the flexible substrate, a sensing circuit disposed in the flexible substrate not to be overlapped with the DDI, a plurality of signal lines each electrically connected between the DDI and at least one pixel of the plurality of pixels, and configured to be used to transmit a signal from the DDI to the at least one pixel, and a sensing line disposed in the flexible substrate and the inactive area except the active area and including a first ending portion which is electrically connected with a power line, and a second ending portion which is electrically connected with at least one signal line of the plurality of signal lines via the sensing circuit.

Switch-based grid for resiliency and yield improvement

A device includes multiple row power lines and multiple row control lines arranged in rows, where each row control line corresponds to one of the row power lines. The device also includes multiple column power lines arranged in columns. The device further includes multiple unit cells, where each unit cell is coupled to one of the row power lines and one of the row control lines and selectively coupled to one of the column power lines. In addition, the device includes multiple row power switches and multiple column power switches arranged in pairs, where each pair includes one of the row power switches and one of the column power switches. Each pair is configured to selectively (i) connect a corresponding one of the rows and a corresponding one of the columns or (ii) isolate the corresponding one row and the corresponding one column from each other.

Gate driver on array (GOA) circuit, display panel and threshold voltage compensating method for a thin film transistor

The present invention provides a gate driver on array (GOA) circuit, a display panel, and a threshold voltage compensating method for a thin film transistor (TFT). The GOA circuit only includes five TFTs and achieves a super narrow bezel of a display panel, and uses a dual-gate electrode structure as the first thin film transistor (T1). Therefore, a threshold voltage (Vth) in the GOA circuit is controlled by a top gate (the top gate connected to a node in the GOA circuit) and a bottom gate (adjustable voltage source (VLS)). Specifically, when the Vth of the TFT negatively shifts overall, the bottom gate voltage can be adjusted negatively. When the Vth of the TFT positively shifts, the bottom gate voltage can be adjusted negatively to stabilize the GOA circuit, increase a lifespan thereof, reduce leakage of a first node (Q) such that the GOA circuit can output ultra-wide pulse signals.

ELECTROLUMINESCENT DISPLAY
20180005582 · 2018-01-04 · ·

An EL display includes a flexible board including: a plurality of connection terminals arranged at one side for connection with panel lines formed on a panel board; terminal connection lines for connecting points inside the flexible board with the connection terminals; serial connection lines for connecting between two or more of the connection terminals. On the flexible board: driver output terminals of each of gate driver ICs are connected to terminal connection lines; driver input terminals of the gate driver IC are connected to either terminal connection lines or the serial connection lines; and control terminals for performing logic setting of the gate driver IC are each arranged between connection terminals and driver input terminals to which the serial connection lines are connected. As a result, the number of control lines to be formed on the flexible board in serial connection is reduced.

CONTROL DEVICE FOR GATE DRIVING CIRCUIT, DISPLAY PANEL AND DISPLAY DEVICE

The embodiments of the application disclose a control device for a gate driving circuit, a display panel and a display device. The control device for a gate driving circuit provided in the embodiment comprises a level shifter and a control module electrically connected with an output of the level shifter. The control module is used for controlling an output signal of the level shifter to be a low level signal when each input clock signal for the level shifter is low.

SELF-COMPENSATING CIRCUIT FOR FAULTY DISPLAY PIXELS
20180005565 · 2018-01-04 ·

A self-compensating circuit for controlling pixels in a display includes a plurality of light-emitter circuits. Each light-emitter circuit includes a light emitter, a drive transistor, and a compensation circuit. The compensation circuit is connected to the light emitter of one or more different light-emitter circuits.

STAGE AND EMISSION CONTROL DRIVER HAVING THE SAME
20230005428 · 2023-01-05 ·

A stage circuit including: an output circuit for supplying a voltage of a first or second power supply to an output terminal in response to voltages of first and second nodes; an input circuit for controlling voltages of the second node and a third node; a first signal processor for controlling the voltage of the first node; a second signal processor configured to control the voltage of the first node in response to an output voltage of a third signal processor and a signal supplied to a third input terminal; and the third signal processor for controlling the voltage of the second node. The third signal processor includes: a third capacitor coupled between the first power supply and the second node; and a third transistor coupled between the first power supply and the third input terminal, and including a gate electrode coupled to the second node.

Semiconductor device and display device

An object of the present invention is to decrease the resistance of a power supply line, to suppress a voltage drop in the power supply line, and to prevent defective display. A connection terminal portion includes a plurality of connection terminals. The plurality of connection terminals is provided with a plurality of connection pads which is part of the connection terminal. The plurality of connection pads includes a first connection pad and a second connection pad having a line width different from that of the first connection pad. Pitches between the plurality of connection pads are equal to each other.

PIXEL DRIVING CIRCUIT AND DISPLAY DEVICE
20230237956 · 2023-07-27 · ·

The present embodiments disclose a pixel driving circuit. A pixel driving circuit according to an embodiment of the present disclosure is electrically connected to a luminous element and comprises a first circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes included in a frame, a second circuit configured to store bit values of multi-bit data in the frame and generate the control signal based on the stored bit values, and a clock signal such that each subframe included in the frame is controlled according to each bit value, and wherein each of the plurality of subframes includes a data-writing period and a light-emitting period, during the data-writing period of each subframe, the second circuit receives and stores a corresponding bit string from among a plurality of bit strings of n-bit data, wherein the plurality of bit strings are generated by a combination of bits in the number of n, which is smaller than m, from among m bits constituting a bit string of the multi-bit data, and the n-bit data is a bit string in which n bits from among the m bits are combined such that a difference in light-emitting periods of the plurality of subframes is minimized.