A pixel circuit and a display device including the same are disclosed. The pixel circuit includes: a driving element including electrodes respectively connected to a first node to receive a first constant voltage, a second node, and a third node; a light emitting element including an anode connected to a fourth node and a cathode to receive a second constant voltage; a first switch to provide a data voltage to the second node; a second switch to provide a third constant voltage to the second node; a third switch to provide a fourth constant voltage to the fourth node; a fourth switch to provide the first constant voltage to the first node; a fifth switch to electrically connect the third node to the fourth node.

A system and method are described for creation of a mosaic display system. A device is assigned an address which may be used to produce unique sequence of illumination which is based on a code determined by the address. A sequence of images of a number of devices may be used to determine a spatial location associated with a device address.

Various aspects of the disclosure generally relate to security for a credit card processing reader. Part of security for a reader is protecting sensitive components, for example components that access information from a credit card during a transaction. An alternative security configuration may include integrated circuits replacing portions of electrically active mesh. This may reduce the size and cost of a reader while maintaining its security with respect to published guidelines.

An address latch, a display device, and an address latching method are disclosed. The address latch includes a write control circuit, a write latch circuit, a latch control circuit, an intermediate latch circuit, and an output latch circuit. The write latch circuit is configured to latch an address data in response to N write control signals generated by the write control circuit, N data bits of the address data are divided into (M−1) data bit groups; the latch control circuit is configured to sequentially generate M latch control signals; the intermediate latch circuit is configured to, in response to first to (M−1)-th latch control signals, latch first to (M−1)-th data bit groups latched by the write latch circuit in a time-division manner; and the output latch circuit is configured to output the address data latched by the intermediate latch circuit in response to an M-th latch control signal.

According to an aspect of the present disclosure, there is provided a display device including a display panel where a plurality of unit pixels are disposed, a gate driver disposed on an upper surface of the display panel and integrated in the plurality of unit pixels. Each of the plurality of unit pixels includes a main pixel and a redundancy pixel, and the gate driver supplies a gate voltage to the main pixel and the redundancy pixel. even if the main pixel becomes defective, the redundancy pixel can emit light instead of the main pixel, so that the reliability of the display device is improved.

The disclosure relates to displays. In one arrangement a plurality of pixels is provided in which each pixel comprises a phase change material thermally switchable between a plurality of stable states. Each pixel comprises a switching device configured to heat the phase change material, and thereby thermally switch the phase change material, in response to a control signal. The switching device comprises a single electronic component capable of being switched between different states by the control signal and configured such that heat received by the phase change material of the pixel during the thermal switching of the phase change material of the pixel consists predominantly of heat generated within the single electronic component.

A pixel circuit and a display device including the same are disclosed. The pixel circuit includes: a driving element including electrodes respectively connected to a first node to receive a first constant voltage, a second node, and a third node; a light emitting element including an anode connected to a fourth node and a cathode to receive a second constant voltage; a first switch to provide a data voltage to the second node; a second switch to provide a third constant voltage to the second node; a third switch to provide a fourth constant voltage to the fourth node; a fourth switch to provide the first constant voltage to the first node; a fifth switch to electrically connect the third node to the fourth node.

A circuit which detects an output current from a pixel and an output current from an input device, and converts the output current into data is provided. The current detection circuit includes an integer circuit, a comparator, a counter, and a latch. The integrator circuit integrates the potential of a first signal during a period determined by a second signal and outputting it as a third signal. The comparator compares the potential of the third signal with a first potential and outputting a fourth signal. The counter outputs the number of pulses included in a fifth signal as a sixth signal during a period determined by the fourth signal. The latch holds the sixth signal. The integrator circuit preferably further includes an operational amplifier and some capacitors. The first signal is supplied from a pixel included in a display device or an input portion included in an input device.

Various aspects of the disclosure generally relate to point-of-sale credit card processing devices. More specifically, the disclosure relates to synchronizing device communications with other device functions in order to reduce cross-platform interference and meet certification requirements.

In an embodiment according to the present disclosure, disclosed is an electronic device including a display, a first housing, a second housing at least partially overlapping and being movable with respect to the first housing, a first conductive region formed or disposed inside the first housing, and a second conductive region formed or disposed inside the second housing so as to at least partially overlap with the first conductive region when the first housing is moved with respect to the first housing, a display in which at least the first region is exposed to the outside of an electronic device through a front surface of the electronic device, and at least one processor in which, when the electronic device is switched from the first state to the second state, a second region extending from the first region of the display is withdrawn from the inside of the first housing and exposed to the outside of the electronic device along with the first region and, when the electronic device is switched from the second state to the first state, is introduced into the inside of the first housing and operatively connected to the display. The at least one processor identifies a capacitance value, based on an overlapped region of the first conductive region and the second conductive region, and determines an externally exposed region of the display, based on the identified capacitance value, and controls the region determined to be exposed outside, to an activated state, and controls the remaining region except the region determined to be exposed outside, to an inactivated state. In addition to this, various embodiments identified through the specification are possible.