A pixel of an OLED display device includes a capacitor coupled between first and second nodes, first and second transistors, each including a gate receiving a respective initialization signal, a first terminal receiving a first power supply voltage, and a second terminal coupled to the capacitor, a third transistor including a first terminal coupled to a data line and a second terminal coupled to the first node, a fourth transistor including a gate coupled to the second node, a first terminal receiving the first power supply voltage, and a second terminal coupled to a third node, a fifth transistor including a first terminal coupled to the third node and a second terminal coupled to the second node, sixth and seventh transistors receiving a scan signal, eighth and ninth transistors receiving an emission signal, and an OLED.

A display module includes a display panel in which a plurality of pixels each including a plurality of sub-pixels are disposed on a plurality of row lines; and a driver. The driver is configured to set a PWM data voltage to the plurality of sub-pixels included in the plurality of row lines in a row line sequence, apply a sweep signal, which is a voltage signal sweeping between two different voltages, to sub-pixels among the plurality of sub-pixels that are included in at least some consecutive row lines among the plurality of row lines in the row line sequence, and drive the display panel to cause the sub-pixels included in the at least some consecutive row lines to emit light based on the PWM data voltage in the row line sequence.

An electronic device is provided. The electronic device includes a semiconductor element and a pixel circuit. The pixel circuit includes a first comparator, a second comparator and a subtraction unit. The first comparator generates a first comparison signal. The second comparator generates a second comparison signal. The subtraction unit is coupled to the semiconductor element and configured to receives the first comparison signal and the second comparison signal and generates a subtraction signal.

The disclosure describes various aspects of backplanes, including unit cells, architectures, and operations. In an aspect, a backplane unit cell is described that includes first and second switches, a storage element, a comparator, a source (e.g., a current or voltage source), where the source generates a drive signal to control light emission of a selected one of the light emitting elements in a display, and where the drive signal is based on a power signal selected by the second switch. In another aspect, a device is described that includes a backplane configured in an active matrix topology including multiple data columns and multiple row selects; and a set of electrical contacts associated with the active matrix topology and configured to electrically couple the backplane with the display, the display having multiple light emitting elements configured in a passive matrix topology. Methods of operation of the backplane are also described.

A display module may include a plurality of pixels, wherein each of the plurality of pixels includes a plurality of subpixels of different colors that are disposed in a matrix form. Each of the plurality of subpixels includes an inorganic light emitting element, a constant current generator which provides a constant current to the inorganic light emitting element, and a pulse width modulation (PWM) circuit which includes a first depletion mode driving transistor, and controls a time during which the constant current flows through the inorganic light emitting element based on a PWM data voltage applied to a gate terminal of the first depletion mode driving transistor and a threshold voltage of the first depletion mode driving transistor.

A the display panel includes a plurality of sub-pixels arranged in rows and columns; one scan line disposed in each of the rows of the plurality of sub-pixels; two data lines are disposed in each of the columns of the plurality of sub-pixels; a first multiplexer configured to select a data line at one side among the two data lines disposed in each column; and a second multiplexer configured to select a data line at another side among the two data lines disposed in each column that can be operated at a high speed using a 2D1G structure as well as at a low speed in an interlace scheme, thus securing 2H sensing time and removing flickering during switching between operations of pixels.

A display device includes a scan write line configured to receive a scan write signal, a scan initialization line configured to receive a scan initialization signal, a sweep signal line configured to receive a sweep signal, a first data line configured to receive a first data voltage, a second data line configured to receive a second data voltage, and a subpixel connected to the scan write line, the scan initialization line, the sweep signal line, the first data line, and the second data line. The subpixel includes a light-emitting element, a first pixel driver including a first transistor configured to generate a control current according to the first data voltage of the first data line, and a second pixel driver including an eighth transistor configured to generate a driving current applied to the light-emitting element according to the second data voltage.

A display panel includes a plurality of pixels arranged in a matrix, the plurality of pixels respectively including a plurality of sub pixels. The plurality of sub pixels respectively includes a light emitting element, and a PWM pixel circuit configured to control a light emitting duration of the light emitting element, based on a pulse width modulation (PWM) data voltage and a sweep voltage. A plurality of PWM pixel circuits included in the display panel are driven, for each of row lines of the plurality of pixels, in an order of a data setting period for setting the PWM data voltage and then a light emitting period in which the light emitting element emits light during a duration corresponding to the set PWM data voltage according to a change of the sweep voltage.

A method provided by the present application comprises: obtaining a number n of rows of pixel units to be precharged; controlling a scanning driving chip to sequentially output n first scanning enable signals to a scanning driving circuit according to the number n of rows; and outputting a second scanning enable signal to the scanning driving circuit, so that the scanning driving circuit is controlled to output a second scanning signal to the pixel units of the n-th row to charge the pixel units of the n-th row.

A display device includes a first pixel driver connected to a sweep line, the first pixel driver generating a control current based on a first data voltage, a second pixel driver connected to a scan control line, the second pixel driver generating a driving current based on a second data voltage and controlling a period for which the driving current flows, based on the control current, and a light-emitting element connected to the second pixel driver to receive the driving current. The first pixel driver includes a first transistor generating the control current based on the first data voltage, a second transistor providing the first data voltage to a first electrode of the first transistor based on a scan write signal, and a first capacitor including a first capacitor electrode connected to a gate electrode of the first transistor, and a second capacitor electrode connected to the sweep line.