A display panel includes a sub-pixel array, gate lines, first data lines, second data lines, a pixel control circuit and a time-division multiplexing circuit. The sub-pixel array includes a plurality of sub-pixels arranged in rows and columns. Sub-pixels in a same row are coupled to the pixel control circuit through at least one gate line. Sub-pixels located in odd-numbered rows in sub-pixels in a same column are coupled to a first data line, and sub-pixels located in even-numbered rows in the sub-pixels in the same column are coupled to a second data line. The time-division multiplexing circuit is coupled to the plurality of first data lines, the plurality of second data lines, and a data signal terminal. The time-division multiplexing circuit is configured to electrically connect the data signal terminal to the first data lines and the second data lines in a time-division manner.

Systems, methods, and apparatuses are disclosed for overcoming latency and loss of signal detection in remote control displays. An exemplary system includes a remote control, a host computing device, and one or more target systems communicatively coupled to each other over a wired and/or wireless network. One method includes receiving, by the remote control and from a host computing device, a first video frame captured by a target device, determining a first time corresponding to receipt of the first video frame, receiving, from the host computing device, a second video frame, determining a second time corresponding to receipt of the second video frame, comparing the time difference to a latency threshold, and causing an alert graphic element to be displayed indicating a latency in communication.

A display device includes a scan line extending in a direction, a data line and a driving voltage line extending in another direction, a transistor electrically connected to the driving voltage line and including a first gate electrode and a first semiconductor layer, a second transistor electrically connected to the scan and data lines and including a second gate electrode and a second semiconductor layer, a first capacitor electrically connected to the first transistor and including first and second capacitor plates, and a second capacitor including a third capacitor plate electrically connected to the first transistor and a fourth capacitor plate electrically connected to the second transistor. The second capacitor plate includes a first hole overlapping the first capacitor plate, the fourth capacitor plate includes a second hole overlapping the third capacitor plate, and a size of the second hole is different from that of the first hole.

A display device dynamically determines pixel settle times to reduce a display latency. The display device includes a backlight unit (BLU) for providing light for displaying an image, a plurality of pixels for modulating the light provided by the BLU, and a controller circuit for controlling the BLU and the plurality of pixels. The controller circuit determines a settle time from display data for a current display frame and display data for a previous display frame, and turns on the BLU based on the determined settle time. The determined settle time corresponding to an expected amount of time for the plurality of pixel to transition from a first state corresponding to the display data for the previous display frame to a second state corresponding to the display data for the current display frame.

A display device may include a display panel and a driver circuit. The display panel may include subpixels, data lines, and reference voltage lines. The driver circuit may drive the data lines. A first subpixel may be connected to a first data line and a first reference voltage line. A driving time of the first subpixel may include a first initialization time in which a reference voltage is applied to the first reference voltage line and a first tracking time in which a voltage of the first reference voltage line increases from the reference voltage. During the first tracking time, a first data signal transferred to the first subpixel through the first data line may be changed from a first voltage value to a reference driving voltage value. The first voltage value may be higher than the reference driving voltage value. The display device may reduce a sensing time.

The disclosure includes multiple data drivers provided for each predetermined number of data lines. Each data driver receives an image signal; generates, based on the image signal, a positive gradation data signal and a negative gradation data signal; outputs one of the positive and negative gradation data signals to one of a first and second data line groups of a display panel; and outputs the other of the positive and negative gradation data signals to the other of the first and second data line groups. The data driver shifts a phase of the negative gradation data signal in a direction delayed with respect to the positive gradation data signal, and controls a slew rate of an output amplifier for outputting the positive gradation data signal to be lower than that of an output amplifier for outputting the negative gradation data signal.

To provide a semiconductor device, a liquid crystal display device, and an electronic device which have a wide viewing angle and in which the number of manufacturing steps, the number of masks, and manufacturing cost are reduced compared with a conventional one. The liquid crystal display device includes a first electrode formed over an entire surface of one side of a substrate; a first insulating film formed over the first electrode; a thin film transistor formed over the first insulating film; a second insulating film formed over the thin film transistor; a second electrode formed over the second insulating film and having a plurality of openings; and a liquid crystal over the second electrode. The liquid crystal is controlled by an electric field between the first electrode and the second electrode.

A liquid crystal display driving method provided includes the following steps: acquiring a current gray level value of a current frame image; determining a gray level of the current gray level value; if the current gray level value is the high gray level, then determining whether to perform an overvoltage driving according to a first gray level difference threshold value; if the current gray level value is the low gray level, then determining whether to perform the overvoltage driving according to a second gray level difference threshold value. The present invention can precisely determine whether to perform the overvoltage driving on the pixel electrode.

An organic light emitting display device includes a plurality of pixels each having a pixel driving circuit. Each of the pixels includes an organic light emitting diode and a driving TFT that controls driving of the organic light emitting diode and includes an active layer of low temperature poly-silicon, a gate node, a source node, and a drain node. The pixels include first to fifth switching TFTs electrically connected to the driving TFT and each including an active layer of an oxide semiconductor, a gate node, a source node, and a drain node. Further, the pixels include a storage capacitor connected between the gate node of the driving TFT and the source node of the fifth switching TFT and a coupling capacitor electrically connected in series to the storage capacitor and configured to cause capacitive coupling to supply a bootstrapped voltage to the gate node of the driving TFT.

According to an aspect of the present disclosure, an organic light emitting display device includes a plurality of pixels each including a pixel driving circuit. The plurality of pixels includes an organic light emitting diode and a driving TFT configured to control driving of the organic light emitting diode and including a gate node as a first node, a source node as a second node, and a drain node. Also, the plurality of pixels includes first to third switching TFTs electrically connected to the driving TFT and first and second storage capacitors configured to store a voltage to be applied to the driving TFT DT. Further, the plurality of pixels includes a coupling capacitor connected to a gate node of the third switching TFT so as to increase a voltage to be applied to the gate node of the driving TFT.