A control method of a display includes a statistics circuit, a backlight determining circuit and a backlight control circuit. The display includes a backlight module having a maximum power. The statistics module receives frame, and generates luminance statistical information of a plurality of blocks included in the frame. The backlight determining circuit determines a backlight intensity corresponding to each of the blocks according to the luminance statistical information of the blocks and the maximum power. At least one of the backlight intensities corresponding to the blocks is greater than a normal luminance, which is a backlight intensity corresponding to one of the blocks when the maximum power is evenly distributed on light emitting elements of the display. The backlight control circuit controls the luminance of the backlight module according to the backlight intensities.

A display device includes a first switching element including a second electrode and a first gate electrode, a second switching element including a third electrode connected with the first gate electrode, a third switching element including a fifth electrode connected with the second electrode, and sixth electrode, a fourth switching element including a seventh electrode connected with the second electrode, and an eighth electrode, a fifth switching element including a ninth electrode connected with the second electrode, and a tenth electrode, a first light emitting diode connected with the sixth electrode and the eighth electrode, a second light emitting diode connected with the eighth electrode and the sixth electrode, and a switch selectively connecting a common power source line with the sixth electrode or the eighth electrode. The first light emitting diode and the second light emitting diode have different polarities from each other with respect to a same direction.

A display device includes a substrate including a display area in which a plurality of sub-pixels are disposed, a plurality of anode electrodes respectively connected to the plurality of sub-pixels, and a cathode electrode connected to the plurality of sub-pixels and spaced apart from each of the plurality of anode electrodes. Each of the plurality of anode electrodes is disposed closer to the substrate than the cathode electrode by a height difference compensation part.

A display device may include a plurality of pixels each including a light emitting element. A first scan line and a second scan line, are disposed in each of the pixels. A data line is disposed in each of the pixels. A power line is disposed in each of the pixels. A reference voltage line is disposed in each of the pixels. A first transistor controls a current of the light emitting element. A second transistor is connected between the data line and a first gate electrode of the first transistor. A third transistor is connected between the reference voltage line and a first electrode of the first transistor. A fourth transistor is connected between the power line and a second electrode of the first transistor. The fourth transistor may be a transistor of a type different from that of the first to third transistors.

A display apparatus includes a body; a display provided in the body; a processor provided in the body and configured to control the display to display an image; and a power supply including an adapter configured to be detachable from the body, and a power assembly configured to receive power from the adapter in a non-contact manner and supply the power to at least one of the display and the processor.

A display device includes a display area of various shapes, has a reduced dead space, and displays an image. Further, the display device includes a display unit including a rounded corner portion, a first driving voltage supply line arranged in a first direction in a non-display area on one side of the display unit, a plurality of first driving voltage lines which supplies a driving voltage to a plurality of pixels and is arranged in a second direction that intersects with the first direction and being connected to the first driving voltage supply line, and a plurality of second driving voltage lines disconnected from the first driving voltage supply line.

A display device may include a display panel including a gate line, a data line, and a pixel electrically connected to the gate line and the data line, where display panel displays an image based on input image data, a gate driver which outputs a gate signal to the gate line, a data driver which outputs a data voltage to the data line, and a power supply voltage generator which provides a driving voltage to the display panel, the gate driver and the data driver. The power supply voltage generator generates a gate clock signal based on an on-clock signal and an off-clock signal and changes a count value of the on-clock signal or the off-clock signal when the gate clock signal is an abnormal signal.

A display apparatus includes: a substrate having a display area and a peripheral area outside the display area; a first conductive layer on the substrate in the peripheral area and comprising a first hole; a second conductive layer on the first conductive layer and overlapping the first conductive layer, the second conductive layer comprising a second hole; a planarization layer extending from the display area to the peripheral area and comprising at least two organic insulating layers between the first conductive layer and the second conductive layer; and a display element on the planarization layer in the display area, wherein a part of a portion of the second conductive layer except for the second hole is in contact with a part of a portion of the first conductive layer except for the first hole.

An electroluminescence display apparatus includes a pixel array, including a plurality of pixels, a gate line connected to pixels adjacent thereto in a first direction in common, a data line connected to pixels adjacent thereto in a second direction intersecting with the first direction in common, and a first power line, a second power line, and an initialization voltage supply line connected to all of the plurality of pixels in common, and a panel driving circuit connected to the pixel array.

A display driver includes a line latch circuit; a first D/A conversion circuit; a second D/A conversion circuit; a first amplifier circuit configured to initialize charges of a capacitor of a first switched capacitor circuit in a first initialization period and output a data voltage in a first output period; a second amplifier circuit configured to initialize charges of a capacitor of a second switched capacitor circuit in a second initialization period and output a data voltage in a second output period; and a control circuit. The control circuit is configured to end the second initialization period of the second amplifier circuit before display data is latched by the line latch circuit at a latch timing and an output of the first amplifier circuit changes.