In a display panel, pixels each including a plurality of sub-pixels are arranged in a matrix form, wherein each of the plurality of sub-pixels includes: an inorganic light-emitting element; a constant current generator circuit that provides a driving current to the inorganic light-emitting element on the basis of a constant current generator data voltage; and a PWM circuit for controlling the time for the driving current to flow through the inorganic light-emitting element on the basis of a PWM data voltage, wherein the constant current generator circuit includes a first driving transistor and the PWM circuit includes a second driving transistor, and wherein the constant current generator circuit or the PWM circuit comprises an internal compensation circuit that compensates for electrical characteristics of the first driving transistor and the second driving transistor.

A display module includes a display panel in which a plurality of pixels each including a plurality of sub-pixels are disposed on a plurality of row lines; and a driver. The driver is configured to set a PWM data voltage to the plurality of sub-pixels included in the plurality of row lines in a row line sequence, apply a sweep signal, which is a voltage signal sweeping between two different voltages, to sub-pixels among the plurality of sub-pixels that are included in at least some consecutive row lines among the plurality of row lines in the row line sequence, and drive the display panel to cause the sub-pixels included in the at least some consecutive row lines to emit light based on the PWM data voltage in the row line sequence.

The disclosure provides a pixel circuit and a driving method thereof, a driving circuit, and a display device, which pertains to the field of pixel driving technology. The pixel circuit includes a capacitor, a capacitor charging transistor, a first and second capacitor discharging transistor. The capacitor is charged to a first voltage greater than the pixel voltage when the capacitor charging transistor is turned on. The capacitor is connected in series with the first and second capacitor discharging transistor to form a discharge circuit, and the capacitor is discharged when the first and second capacitor discharging transistor are turned on so that the voltage across the capacitor drops from the first voltage to the pixel voltage. There is no need to arrange a Gamma resistor for the driving circuit for the pixel circuit array provided by the disclosure, which makes the structure simple and the power consumption in driving low.

The present disclosure relates to an LED driving technology. According to the present disclosure, it is possible to increase the fineness of the gray scale without increasing a frequency of a clock by combining a plurality of driving current sources to generate a driving current supplied to one driving line.

The disclosure describes various aspects of backplanes, including unit cells, architectures, and operations. In an aspect, a backplane unit cell is described that includes first and second switches, a storage element, a comparator, a source (e.g., a current or voltage source), where the source generates a drive signal to control light emission of a selected one of the light emitting elements in a display, and where the drive signal is based on a power signal selected by the second switch. In another aspect, a device is described that includes a backplane configured in an active matrix topology including multiple data columns and multiple row selects; and a set of electrical contacts associated with the active matrix topology and configured to electrically couple the backplane with the display, the display having multiple light emitting elements configured in a passive matrix topology. Methods of operation of the backplane are also described.

Methods and apparatuses relating to controlling an emission of a display panel. In one embodiment, a display driver hardware circuit includes row selection logic to select a number of rows in an emission group of a display panel, wherein the number of rows is adjustable from a single row to a full panel of the display panel, column selection logic to select a number of columns in the emission group of the display panel, wherein the number of columns is adjustable from a single column to the full panel of the display panel, and emission logic to select a number of pulses per data frame to be displayed, wherein the number of pulses per data frame is adjustable from one to a plurality and a pulse length is adjustable from a continuous duty cycle to a non-continuous duty cycle.

In a display apparatus, a display panel includes a pixel array of pixels, each pixel disposed on one of a plurality of row lines and including a plurality of inorganic LEDs, and a sub pixel circuit corresponding to each of the plurality of LEDs. Each sub pixel circuit includes a PMOSFET driving transistor, and drives a corresponding LED based on an applied image data voltage. A sensing part senses a current through the driving transistor of at least one sub pixel circuit based on a specified voltage applied to the sub pixel circuit, and outputs corresponding sensing data. A correcting part corrects an image data voltage applied to the sub pixel circuit based on the sensing data. In each LED, an anode electrode is coupled to a common node to which a driving voltage is applied, and a cathode electrode is coupled to a source terminal of the driving transistor.

A control method of a power supply path includes detecting a plug-in state of a first connector through a configuration channel pin of the first connector; acquiring a plurality of rated voltages of a first power adaptor externally connected to the first connector and a rated current corresponding to each of the rated voltages; detecting a plug-in state of a second connector through a direct-current (DC) input pin of the second connector; acquiring a power quota of a second power adaptor externally connected to the second connector; selecting, from the plurality of rated voltages, the largest one that is not greater than an operating voltage, as a selected rated voltage; calculating a power quota of the selected rated voltage; and controlling a switching circuit to couple a power circuit to a power pin of one of the first and second connectors according to the two power quotas.

A display device includes a substrate including a display area in which a plurality of sub-pixels are disposed, a plurality of anode electrodes respectively connected to the plurality of sub-pixels, and a cathode electrode connected to the plurality of sub-pixels and spaced apart from each of the plurality of anode electrodes. Each of the plurality of anode electrodes is disposed closer to the substrate than the cathode electrode by a height difference compensation part.

Display device including: a pixel matrix comprising a plurality of pixel groups, each group comprising a plurality of pixel blocks; a video card comprising an input configured to receive a digital signal to be displayed, and a plurality of outputs each coupled to a group by an associated primary data distribution network, the video card being configured to decode the digital signal and send to each of the outputs of digital data encoded in a format suitable for the matrix and intended to be displayed by the group coupled to said output; and wherein: each group includes a plurality of control circuits each associated with a block of the group and coupled to the associated main data bus; each pixel includes a driver circuit configured to generate pixel control signals.