A display panel and a display device are provided in the present disclosure. The display panel includes drive circuits and pixel circuits, where the drive circuits provide control signals for the pixel circuits, the pixel circuits provide drive currents for light-emitting elements of the display panel, and the drive circuits include a first drive circuit and a second drive circuit; and further includes signal line groups. The signal line groups include a first signal line group and a second signal line group. Along the second direction, a width of the first drive circuit is W1, a width of the second drive circuit is W2, a total width of the M0 signal lines in the first signal line group is D1, a total width of the N0 signal lines in the second signal line group is D2, W2>W1, D2>D1, and D2/W2>D1/W1.

A display panel and a display device are provided in the present disclosure. The display panel includes drive circuits and pixel circuits, where the drive circuits provide control signals for the pixel circuits, the pixel circuits provide drive currents for light-emitting elements of the display panel, and the drive circuits include a first drive circuit and a second drive circuit; and further includes signal line groups. The signal line groups include a first signal line group and a second signal line group. Along the second direction, a width of the first drive circuit is W1, a width of the second drive circuit is W2, a total width of the M0 signal lines in the first signal line group is D1, a total width of the N0 signal lines in the second signal line group is D2, W2>W1, D2>D1, and D2/W2>D1/W1.

The present invention reliably and sufficiently corrects a voltage variation in data signal lines in a display device resulting when sampling analog video signals, while suppressing increase in layout area. In a data signal line drive circuit of an active matrix liquid crystal display device, a video signal Svi is sampled by an Nch transistor (SWk) which has a parasitic capacitance (Cgd) that causes a voltage drop in a data signal line SL3(i−1)+k (i=1 through n; k=1, 2, 3). To correct this, an inversion delayer (342) makes logical inversion of the transistor (SWk)'s control signal Sck and delays the inverted signal for a predetermined time to generate an inversion delayed signal Srdk, and applies this inversion delayed signal Srd to the data signal line 3(i−1)+k via a correction capacitance element (Cc). The inversion delayer (342) makes the inversion delayed signal Srdk start its change from an L level voltage to a H level voltage after the Nch transistor (SWk) has assumed an OFF state.

The present invention reliably and sufficiently corrects a voltage variation in data signal lines in a display device resulting when sampling analog video signals, while suppressing increase in layout area. In a data signal line drive circuit of an active matrix liquid crystal display device, a video signal Svi is sampled by an Nch transistor (SWk) which has a parasitic capacitance (Cgd) that causes a voltage drop in a data signal line SL3(i−1)+k (i=1 through n; k=1, 2, 3). To correct this, an inversion delayer (342) makes logical inversion of the transistor (SWk)'s control signal Sck and delays the inverted signal for a predetermined time to generate an inversion delayed signal Srdk, and applies this inversion delayed signal Srd to the data signal line 3(i−1)+k via a correction capacitance element (Cc). The inversion delayer (342) makes the inversion delayed signal Srdk start its change from an L level voltage to a H level voltage after the Nch transistor (SWk) has assumed an OFF state.

Disclosed are a display apparatus, a method for synthesizing images of a moving object and a device. The display apparatus includes: a display panel, including a main display region and a transparent display region at least partially provided in the main display region; and an image acquisition component, provided on a non-display side of the transparent display region, and configured to acquire a light incident from a display side of the transparent display region and penetrating the transparent display region. The image acquisition component is configured to continuously acquire, at a predetermined time interval, light of a moving object transmitting through the transparent display region, to obtain n images, diffraction spots of at least two of the n images are different. The image acquisition component is further configured to merge the n images to obtain m synthetic image(s) to eliminate or weaken diffraction spots in the n images.

Disclosed are a display apparatus, a method for synthesizing images of a moving object and a device. The display apparatus includes: a display panel, including a main display region and a transparent display region at least partially provided in the main display region; and an image acquisition component, provided on a non-display side of the transparent display region, and configured to acquire a light incident from a display side of the transparent display region and penetrating the transparent display region. The image acquisition component is configured to continuously acquire, at a predetermined time interval, light of a moving object transmitting through the transparent display region, to obtain n images, diffraction spots of at least two of the n images are different. The image acquisition component is further configured to merge the n images to obtain m synthetic image(s) to eliminate or weaken diffraction spots in the n images.

A display device includes a first pixel driver connected to a sweep line, the first pixel driver generating a control current based on a first data voltage, a second pixel driver connected to a scan control line, the second pixel driver generating a driving current based on a second data voltage and controlling a period for which the driving current flows, based on the control current, and a light-emitting element connected to the second pixel driver to receive the driving current. The first pixel driver includes a first transistor generating the control current based on the first data voltage, a second transistor providing the first data voltage to a first electrode of the first transistor based on a scan write signal, and a first capacitor including a first capacitor electrode connected to a gate electrode of the first transistor, and a second capacitor electrode connected to the sweep line.

A display device includes a first pixel driver connected to a sweep line, the first pixel driver generating a control current based on a first data voltage, a second pixel driver connected to a scan control line, the second pixel driver generating a driving current based on a second data voltage and controlling a period for which the driving current flows, based on the control current, and a light-emitting element connected to the second pixel driver to receive the driving current. The first pixel driver includes a first transistor generating the control current based on the first data voltage, a second transistor providing the first data voltage to a first electrode of the first transistor based on a scan write signal, and a first capacitor including a first capacitor electrode connected to a gate electrode of the first transistor, and a second capacitor electrode connected to the sweep line.

A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Edge buffers corresponding to potentially interfering analog signal lines are searched to identify potentially interfering pulse edges. A set of potentially interfering pulse edges are selected for interference mitigation, and the target signal pattern is modified to perform preemptive interference mitigation based at least in part on the selected pulse edges.

A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Edge buffers corresponding to potentially interfering analog signal lines are searched to identify potentially interfering pulse edges. A set of potentially interfering pulse edges are selected for interference mitigation, and the target signal pattern is modified to perform preemptive interference mitigation based at least in part on the selected pulse edges.