A display driver includes image processing circuitry and drive circuitry. The image processing circuitry is configured to receive a foveal image, a full frame image, and coordinate data that specifies a position of the foveal image in the full frame image. The image processing circuitry is further configured to render a resulting image based on the full frame image independently of the foveal image in response to detection of a data error within the coordinate data. The drive circuitry is configured to drive a display panel based on the resulting image.

A processing system comprises a first integrated circuit (IC) and a second IC. The first IC comprises first image processing circuitry, first display panel driver circuitry, and first communication circuitry. The first image processing circuitry is configured to generate a first overlay image by overlaying a first partial input image with a first image element based on first partial input image data representing the first partial input image and first image element data representing the first image element. The first display panel driver circuitry is configured to drive a display panel based on the first overlay image. The first communication circuitry is configured to output second image element data representing a second image element to the second IC.

The present invention provides a method for generating a plurality of on-screen display (OSD) data used in a back-end (BE) circuit. The BE circuit is configured to process a plurality of image data to be displayed on a display device. The method includes steps of: receiving the plurality of image data from an application processor (AP); and extracting information of a detecting layer embedded in the plurality of image data, wherein the information of the detecting layer indicates the plurality of OSD data corresponding to at least one user-interface (UI) layer in the plurality of image data.

The present invention provides a method for generating a plurality of on-screen display (OSD) data used in a back-end (BE) circuit. The BE circuit is configured to process a plurality of image data to be displayed on a display device. The method includes steps of: receiving the plurality of image data from an application processor (AP); and extracting information of a detecting layer embedded in the plurality of image data, wherein the information of the detecting layer indicates the plurality of OSD data corresponding to at least one user-interface (UI) layer in the plurality of image data.

This application is directed to a method of managing processing capability of a server system having one or more processing cores that further include multiple processing slices. Upon receiving requests to initiate online gaming sessions, the server system allocates each processing slice of the processing cores to a subset of the online gaming sessions to be executed thereon. A first processing slice is allocated to a first subset of the online gaming sessions including a first gaming session and a second gaming session. At the first processing slice, a time-sharing processing schedule is determined for the first subset of the online gaming sessions. In accordance with the time-sharing processing schedule, the first and second gaming sessions share a duty cycle of the first processing slice, and are executed dynamically and in parallel according to real-time data processing need of the first and second gaming sessions.

Described herein are, among other things, techniques, devices, and systems for streaming pixel data from a host computer to a wireless display device with low latency. In some embodiments, a user mode driver is executed in user mode of the host computer to configure a wireless network interface controller of the host computer to operate in a low latency manner. The display device may use a Forward Error Correction (FEC) algorithm to reconstruct a frame from the data packets it receives from the host computer. Also disclosed are techniques for scrambling the transmission of a series of data packets using different antenna configurations, as well as setting a modulation and coding scheme (MCS) rate based at least in part on the amount of pixel data to be transmitted to the display device. The display device may comprise a head-mounted display (HMD) that renders virtual reality (VR) game imagery.

This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for parallelization of GPU composition with DPU topology selection. A processor may receive an indication of a plurality of application layers for composition at a first processor (e.g., a DPU) and a second processor (e.g., a GPU). The processor may select one or more first application layers of the plurality of application layers for attempted composition at the first processor and one or more second application layers of the plurality of application layers for composition at the second processor. The processor may transmit each of the one or more first application layers to the first processor for composition and each of the one or more second application layers to the second processor for composition.

Systems and methods for a multi-primary color system for display. A multi-primary color system increases the number of primary colors available in a color system and color system equipment. Increasing the number of primary colors reduces metameric errors from viewer to viewer. A six-primary color system includes Red, Green, Blue, Cyan, Yellow, and Magenta primaries. The systems of the present invention maintain compatibility with existing color systems and equipment and provide systems for backwards compatibility with older color systems.

An information processing apparatus that functions as a non-limiting example image processing apparatus includes a processor. When an original image drawn with horizontally-long first pixels is to be drawn by square second pixels, the processor generates two intermediate image data in each of which the number of second pixels is 1.2 times the number of first pixels of the original image data, by generating a second area formed with six (6) second pixels arranged in a horizontal direction for each of first areas that are formed dividing the original image by every five (5) first pixels arranged in the horizontal direction, and outputs the two intermediate image data to a display control device. The display control device generates output image data by synthesizing the two intermediate image data, and outputs the generated output image data to a display. The output image data is generated in each of the second areas with colors that include colors of the second pixels at both ends, which are in agreement with colors of the first pixels at both ends in each corresponding first area and colors of the second pixels other than the both ends, each of which is generated based on colors of adjacent two first pixels in corresponding first area.

A method for driving electro-optic displays including a layer of electro-optic material disposed between a common electrode and a backplane including an array of pixel electrodes, each coupled to a pixel transistor. The method for driving includes apportioning a displayable region of the electro-optic display into N BRAID line groups, where each of the N BRAID line groups is associated with a frame buffer. The method also includes receiving first image data comprising optical state data for the entire displayable region of the electro-optic display, and sequentially writing subsets of the first image data to each of the N frame buffers, wherein each of the N frame buffers is written with data corresponding to the corresponding BRAID line group. The method also includes sequentially updating portions of the displayable region of the electro-optic display based on the data in each of the N frame buffers.