A method includes coupling an electric motor in a hard disk drive to a set of driver circuits. Each driver circuit includes a high-side switch and a low-side switch. The high-side switch has a high-side current flow path between a supply node coupled to a supply voltage and a switching node coupled to a winding of the electric motor. The low-side switch has a low-side current flow path between the switching node and ground. Respective conduction currents are generated through the low-side current flow paths, in response to a command to reduce the motor speed by coupling a drive voltage to the control terminals of the low-side switches. An intensity of at least one of the respective conduction currents is sensed. In response to the sensed current intensity exceeding a current intensity threshold, the control terminals of the low-side switches are coupled to respective ones of the switching nodes.

The present disclosure relates to a system and methods of controlling a system of storage devices. In particular, the present disclosure relates to methods of controlling peak power and energy consumption in storage systems due to storage devices while maintaining data availability. The system implements a method for maintaining data availability in a storage subsystem by determining a plurality of storage devices to include in a fixed set of storage devices based on a fault tolerance system. The storage devices included in the fixed set are prevented from transitioning between RPM spin modes. The method further involves controlling peak power and energy consumed by the storage subsystem which may include transitioning the storage devices not included in the fixed set from a high RPM operational mode to a low RPM operational mode to reduce peak power and energy consumption.

The phase of a drive current of a motor is optimized. The phase arithmetic unit PHCAL calculates a drive voltage phase drv to converge the phase difference between the reference voltage phase bemf and the reference current phase i to zero based on a prescribed arithmetic expression. The phase correction unit PHCP determines the phase drvR after the correction by adding a correction value to the phase drv, and the magnitude of the correction value is updated by a feedback control so as to converge to a prescribed value the phase difference between the reference voltage phase bemf and the reference current phase i which are inputted. A PWM controller shifts an energization control timing synchronized with the reference voltage phase bemf based on the corrected phase drvR, and generates the PWM signal for controlling the drive voltage to a sine wave shape.