A data storage rack may only have a subset of the HDDs therein operating in an active mode where read/write operations may be performed. Other HDDs may operate in an idle mode, which is a power-saving state that permits the HDDs to quickly change-over to the active mode, when needed. In storage racks containing numerous HDDs, a majority of the HDDs may be operated at idle mode for a majority of the time. Where a large number of HDDs are operated at idle mode, a fixed common idle speed shared by the numerous HDDs can cause unwanted excitation, vibration, and resonance. This can yield increased wear on rack components, decreased performance from the HDDs therein, and increased noise. Variable HDD idle spindle speeds mitigate the foregoing, which is caused by an idle spindle speed previously common to many, if not all HDDs within the data storage rack.

A method includes coupling an electric motor in a hard disk drive to a set of driver circuits. Each driver circuit includes a high-side switch and a low-side switch. The high-side switch has a high-side current flow path between a supply node coupled to a supply voltage and a switching node coupled to a winding of the electric motor. The low-side switch has a low-side current flow path between the switching node and ground. Respective conduction currents are generated through the low-side current flow paths, in response to a command to reduce the motor speed by coupling a drive voltage to the control terminals of the low-side switches. An intensity of at least one of the respective conduction currents is sensed. In response to the sensed current intensity exceeding a current intensity threshold, the control terminals of the low-side switches are coupled to respective ones of the switching nodes.

According to one embodiment, there is provided a disk device including a head, a disk, a first motor, and a first circuit. The disk has a recording surface. The first motor causes the head to seek along the recording surface. The first circuit can switch between a first state and a second state. The first state is a state where a current path of the first motor is electrically cut off from a first electricity storage unit. The second state is a state where the current path of the first motor is electrically connected to the first electricity storage unit.

HDDs including multiple heads driven by separate actuator spindles can read from or write to one or more platters simultaneously. Simultaneous active heads can be used to increase data rate or for other purposes. The multiple independently-actuated heads can access the same platter or different platters and may be moved across an associated platter surface in a number of different ways. However, multiple independently operating actuators may lead to mechanical coupling between the actuators. For example, as certain resonant frequencies, the movement of one actuator arm may cause unacceptable movement of another actuator arm within the HDD. This mechanical coupling can have detrimental effects on the HDD. The disclosed coupling observer and disable systems detect and mitigate detrimental effects of mechanical coupling between the independently operated actuators.

According to one embodiment, there is provided a disk device including a head, a disk, a first motor, and a first circuit. The disk has a recording surface. The first motor causes the head to seek along the recording surface. The first circuit can switch between a first state and a second state. The first state is a state where a current path of the first motor is electrically cut off from a first electricity storage unit. The second state is a state where the current path of the first motor is electrically connected to the first electricity storage unit.

According to one embodiment, there is provided a disk device including a head, a disk, a first motor, and a first circuit. The disk has a recording surface. The first motor causes the head to seek along the recording surface. The first circuit can switch between a first state and a second state. The first state is a state where a current path of the first motor is electrically cut off from a first electricity storage unit. The second state is a state where the current path of the first motor is electrically connected to the first electricity storage unit.

According to one embodiment, there is provided a disk device including a head, a disk, a first motor, and a first circuit. The disk has a recording surface. The first motor causes the head to seek along the recording surface. The first circuit can switch between a first state and a second state. The first state is a state where a current path of the first motor is electrically cut off from a first electricity storage unit. The second state is a state where the current path of the first motor is electrically connected to the first electricity storage unit.

A baseline performance of a disk drive is found based on a media speed and a bit aspect ratio of the drive. A parallelism architecture is chosen for the disk drive based on an end-use application of the drive. The parallelism architecture includes two heads capable of simultaneously accessing one or more disks of the disk drive. An increased performance of the disk drive is determined due to the parallelism architecture, and at least one of the media speed and bit aspect ratio are reduced such that a final drive performance with the parallelism architecture satisfies the baseline performance, the baseline performance being less than the increased performance. The reduction of the media speed and/or bit aspect ratio increases another capability of the drive over that of the equivalent drive.

The phase of a drive current of a motor is optimized. The phase arithmetic unit PHCAL calculates a drive voltage phase drv to converge the phase difference between the reference voltage phase bemf and the reference current phase i to zero based on a prescribed arithmetic expression. The phase correction unit PHCP determines the phase drvR after the correction by adding a correction value to the phase drv, and the magnitude of the correction value is updated by a feedback control so as to converge to a prescribed value the phase difference between the reference voltage phase bemf and the reference current phase i which are inputted. A PWM controller shifts an energization control timing synchronized with the reference voltage phase bemf based on the corrected phase drvR, and generates the PWM signal for controlling the drive voltage to a sine wave shape.

The present disclosure relates to a system and methods of controlling a system of storage devices. In particular, the present disclosure relates to methods of controlling peak power and energy consumption in storage systems due to storage devices while maintaining data availability. The system implements a method for maintaining data availability in a storage subsystem by determining a plurality of storage devices to include in a fixed set of storage devices based on a fault tolerance system. The storage devices included in the fixed set are prevented from transitioning between RPM spin modes. The method further involves controlling peak power and energy consumed by the storage subsystem which may include transitioning the storage devices not included in the fixed set from a high RPM operational mode to a low RPM operational mode to reduce peak power and energy consumption.