A storage device and a data storing method thereof are provided. The storage device includes a data storage medium and the control unit. The data storage medium includes a data storage area with a plurality of first type of data blocks. When a data reading operation is executed on a current data block of the data storage medium, the control unit determines whether a read count of the current data block is greater than a first threshold, determines whether the current data block is one of the first type of data blocks and generate a determination result according to the result, the control unit selects a plurality of first type of data blocks and switches the selected data blocks to a fast mode. Finally, the control unit moves data stored in the current data block to the selected data blocks under fast mode.

A semiconductor memory device includes a memory cell array to which a plurality of word lines are coupled, a voltage generation circuit configured to apply operating voltages to the plurality of word lines during a program operation, and a control logic configured to control the voltage generation circuit to perform a discharge operation for the plurality of word lines when an external power supply voltage is reduced during the program operation, wherein the control logic controls the voltage generation circuit such that, during the discharge operation, a potential level of a selected word line among the plurality of word lines is discharged, and then potential levels of the other unselected word lines are discharged.

A semiconductor memory device includes a memory cell array to which a plurality of word lines are coupled, a voltage generation circuit configured to apply operating voltages to the plurality of word lines during a program operation, and a control logic configured to control the voltage generation circuit to perform a discharge operation for the plurality of word lines when an external power supply voltage is reduced during the program operation, wherein the control logic controls the voltage generation circuit such that, during the discharge operation, a potential level of a selected word line among the plurality of word lines is discharged, and then potential levels of the other unselected word lines are discharged.

Provided herein are a semiconductor memory device and an operating method thereof. The semiconductor memory device includes a memory cell array to which a plurality of word lines are coupled, a voltage generation circuit configured to apply operating voltages to the plurality of word lines during a program operation, and a control logic configured to control the voltage generation circuit to perform a discharge operation for the plurality of word lines when an external power supply voltage is reduced during the program operation, wherein the control logic controls the voltage generation circuit such that, during the discharge operation, a potential level of a selected word line among the plurality of word lines is discharged, and then potential levels of the other unselected word lines are discharged.

Provided herein are a semiconductor memory device and an operating method thereof. The semiconductor memory device includes a memory cell array to which a plurality of word lines are coupled, a voltage generation circuit configured to apply operating voltages to the plurality of word lines during a program operation, and a control logic configured to control the voltage generation circuit to perform a discharge operation for the plurality of word lines when an external power supply voltage is reduced during the program operation, wherein the control logic controls the voltage generation circuit such that, during the discharge operation, a potential level of a selected word line among the plurality of word lines is discharged, and then potential levels of the other unselected word lines are discharged.

A nonvolatile semiconductor memory device includes a memory cell array. The memory cells of the memory cell array can be programmed to have different threshold voltages. A word line is connected to the memory cells. A controller is configured to receive a first command and perform a first read sequence and a second read sequence to read data from the memory cell array. In the first read sequence, a series of different voltage levels are applied to the word line and data is read from the array at each voltage level. In the second read sequence, a read voltage level is set based on the data obtained during the first read sequence. The read voltage level is applied to the word line to read the data to be output from the memory cell array.