A semiconductor structure and a memory are provided. The semiconductor structure includes a first active area; a first gate located on the first active area, the first active area and the first gate being configured to form a first transistor; a second active area, the second active area and the first active area being arranged along a first direction, the second active area and the first active area being independent from each other; a second gate located on the second active area, and the second active area and the second gate being configured to form a second transistor, wherein sizes of the first transistor and the second transistor are same, a deviation between an electrical parameter of the first transistor and an electrical parameter of the second transistor is below a preset threshold, and the first transistor and the second transistor belong to a cross coupling amplifying unit.

A semiconductor device includes: a sense amplifier; a branched line selectively connectable to the amplifier; an array of bit lines connected to corresponding memory cells; and an intra-sense-amplifier recycling arrangement configured to do as follows including: recovering a first charge from a first bit line associated with a first one of the memory cells, the first charge being associated with a preceding first evaluation performed by the sense amplifier; and boosting the branched line to a reference voltage including reusing the first charge to at least partially charge the branched line; and wherein the sense amplifier is configured to make a second evaluation of a stored value in a second memory cell relative to the reference voltage.

A sense component of a memory device in accordance with the present disclosure may selectively employ components having a relatively high voltage isolation characteristic in a portion of the sense component associated with relatively higher voltage signals (e.g., signals associated with accessing a ferroelectric random access memory (FeRAM) cell), and components having a relatively low voltage isolation characteristic in a portion of the sense component associated with relatively lower voltage signals (e.g., input/output signals according to some memory architectures). Voltage isolation characteristics may include isolation voltage, activation threshold voltage, a degree of electrical insulation, and others, and may refer to such characteristics as a nominal value or a threshold value. In some examples the sense component may include transistors, and the voltage isolation characteristics may be based at least in part on gate insulation thickness of the transistors in each portion of the sense component.

A method (for recycling charge from a first bit line of a memory device to a second bit line of the memory device) includes: before pre-filling the second bit line, momentarily closing switches to transfer a first charge from the first bit line which is involved in a first read operation to the second bit line which is involved subsequently in a second read operation; and each of the first bit line and the second bit line being served by a same sense amplifier.

A sense component of a memory device in accordance with the present disclosure may selectively employ components having a relatively high voltage isolation characteristic in a portion of the sense component associated with relatively higher voltage signals (e.g., signals associated with accessing a ferroelectric random access memory (FeRAM) cell), and components having a relatively low voltage isolation characteristic in a portion of the sense component associated with relatively lower voltage signals (e.g., input/output signals according to some memory architectures). Voltage isolation characteristics may include isolation voltage, activation threshold voltage, a degree of electrical insulation, and others, and may refer to such characteristics as a nominal value or a threshold value. In some examples the sense component may include transistors, and the voltage isolation characteristics may be based at least in part on gate insulation thickness of the transistors in each portion of the sense component.

A semiconductor device includes: a sense amplifier; a branched line selectively connectable to the amplifier; an array of bit lines connected to corresponding memory cells; and an intra-sense-amplifier recycling arrangement configured to do as follows including: recovering a first charge from a first bit line associated with a first one of the memory cells, the first charge being associated with a preceding first evaluation performed by the sense amplifier; and boosting the branched line to a reference voltage including reusing the first charge to at least partially charge the branched line; and wherein the sense amplifier is configured to make a second evaluation of a stored value in a second memory cell relative to the reference voltage.

A semiconductor device includes: a sense amplifier; a branched line selectively connectable to the sense amplifier; a recycling arrangement selectively connectable to the branched line; an array of memory cells; an array of bit lines connected to corresponding memory cells in the array of memory cells; a multiplexer configured to selectively connect the branched line to a selected one in the array of memory cells through a corresponding line amongst the array of bit lines; and a controller configured to control the recycling arrangement and the multiplexer to perform intra-sense-amplifier recycling of a gleaned amount of charge (gleaned charge) recovered from a first read operation to a second read operation.

A semiconductor device includes: a sense amplifier; a branched line selectively connectable to the sense amplifier; a recycling arrangement selectively connectable to the branched line; an array of memory cells; an array of bit lines connected to corresponding memory cells in the array of memory cells; a multiplexer configured to selectively connect the branched line to a selected one in the array of memory cells through a corresponding line amongst the array of bit lines; and a controller configured to control the recycling arrangement and the multiplexer to perform intra-sense-amplifier recycling of a gleaned amount of charge (gleaned charge) recovered from a first read operation to a second read operation.

A sense component of a memory device in accordance with the present disclosure may selectively employ components having a relatively high voltage isolation characteristic in a portion of the sense component associated with relatively higher voltage signals (e.g., signals associated with accessing a ferroelectric random access memory (FeRAM) cell), and components having a relatively low voltage isolation characteristic in a portion of the sense component associated with relatively lower voltage signals (e.g., input/output signals according to some memory architectures). Voltage isolation characteristics may include isolation voltage, activation threshold voltage, a degree of electrical insulation, and others, and may refer to such characteristics as a nominal value or a threshold value. In some examples the sense component may include transistors, and the voltage isolation characteristics may be based at least in part on gate insulation thickness of the transistors in each portion of the sense component.

A sense component of a memory device in accordance with the present disclosure may selectively employ components having a relatively high voltage isolation characteristic in a portion of the sense component associated with relatively higher voltage signals (e.g., signals associated with accessing a ferroelectric random access memory (FeRAM) cell), and components having a relatively low voltage isolation characteristic in a portion of the sense component associated with relatively lower voltage signals (e.g., input/output signals according to some memory architectures). Voltage isolation characteristics may include isolation voltage, activation threshold voltage, a degree of electrical insulation, and others, and may refer to such characteristics as a nominal value or a threshold value. In some examples the sense component may include transistors, and the voltage isolation characteristics may be based at least in part on gate insulation thickness of the transistors in each portion of the sense component.