A dielectric composition that contains a first complex oxide represented by (Bi.sub.xNa.sub.1−x)TiO.sub.3—CaTiO.sub.3 and having a perovskite structure as a main component; and at least one second complex oxide having a perovskite structure selected from the group consisting of BaZrO.sub.3, SrZrO.sub.3, CaZrO.sub.3, NaNbO.sub.3, and NaTaO.sub.3 as an auxiliary component. A tolerance factor t when the at least one second complex oxide is BaZrO.sub.3, NaNbO.sub.3, or NaTaO.sub.3 is 0.9016≤t≤0.9035, a tolerance factor t when the at least one second complex oxide is SrZrO.sub.3 is 0.9005≤t≤0.9025, and a tolerance factor t when the at least one second complex oxide is CaZrO.sub.3 is 0.9000 t<0.9020.

A ceramic electronic device includes a dielectric layer and an internal electrode layer that are alternately stacked, wherein the dielectric layer contains yttria-stabilized zirconia and (Ca.sub.x1Ba.sub.x2Sr.sub.1-x1-x2)(Ti.sub.yZr.sub.1-y)O.sub.3 (0.6≤x1≤0.9, 0≤x2≤0.1, 0≤y≤0.1) as a main component, and wherein, in the dielectric layer, a concentration of the yttria-stabilized zirconia when a total amount of Ti and Zr is 100 mol % is 0.5 mol % or more and 5.0 mol % or less.

A multilayer capacitor includes a body having a plurality of dielectric layers and first and second internal electrodes alternately disposed with the dielectric layers interposed therebetween, and further including an active region in which the first and second internal electrodes overlap each other, and upper and lower covers disposed above and below the active region, respectively; and first and second external electrodes disposed on the body to be connected to the first and second internal electrodes, respectively, wherein the upper and lower covers include barium titanate (BT, BaTiO.sub.3) and Yttria-stabilized zirconia (YSZ).

A multilayer ceramic capacitor includes a multilayer body including dielectric layers which are stacked and internal electrode layers which are stacked, and external electrodes, each connected to the internal electrode layers. The external electrodes each include a conductive resin layer and a plated layer on the conductive resin layer. The conductive resin layer includes a resin portion, conductive fillers dispersed in the resin portion, and metal particles dispersed unevenly in a distribution differing from that of the conductive fillers in the conductive resin layer. An abundance ratio of the metal particles to the resin portion is higher on a side of the plated layer of the conductive resin layer than on a side of the conductive resin layer close to the multilayer body.

A multilayer electronic component that includes a stacked body having therein a plurality of dielectric layers including a CZ-based perovskite phase and an element M1, a plurality of internal electrode layers including Cu, and an interface layer including the element M1 in at least a portion of an interface with the plurality of internal electrode layers. Element M1 is an element that has a binding energy between CZ and Cu via the element M1 of less than or equal to −9.8 eV by first-principles calculation using a pseudopotential method. When amounts of elements included in the dielectric layers are expressed as parts by mol, a ratio m1 of an amount of the element M1 to an amount of the Zr in the interface layer is 0.03≤m1≤0.25.

A multilayer ceramic electronic component includes first and second multilayer ceramic electronic component bodies facing each other in a length direction that connects first and second end surfaces. A first metal terminal is connected to a first outer electrode. A second metal terminal is connected to a fourth outer electrode. An outer casing covers the first and second multilayer ceramic electronic component bodies, and at least a portion of each of the first and second metal terminals. A third metal terminal is exposed from the outer casing.

An amorphous dielectric includes a compound represented by A.sub.1+αBO.sub.xN.sub.y. −0.3≤α≤0.3, 0<x≤3.50, 0≤y≤1.00, and 6.70≤2x+3y≤7.30 are satisfied. A sum of an average valence of A-site ions and an average valence of B-site ions is 6.70 to 7.30.

Provided are a capacitor and a semiconductor device including the same. The capacitor includes: a dielectric layer having a perovskite crystal structure; and first and second electrodes spaced apart from each other with the dielectric layer therebetween. At least one of the first and second electrodes includes a metallic layer having a perovskite crystal structure, a first ionic layer having ionic properties, and a semiconductor layer.

A multilayer ceramic capacitor includes a stacked body and external electrodes. The stacked body includes stacked dielectric layers and internal electrodes. The external electrodes are disposed on lateral surfaces of the stacked body and are connected to the internal electrodes. The dielectric layers include outer layer portions and an effective layer portion. Each outer layer portion is adjacent to a corresponding main surface of the stacked body. Each outer layer portion is a dielectric layer located between a corresponding main surface and an internal electrode closest to the main surface. A ratio of a dimension of the effective layer portion in a stacking direction to a dimension of the stacked body in the stacking direction is not less than about 53% and not more than about 83%.

A multilayer ceramic capacitor includes an external electrode including an underlying electrode layer, a lower plating layer on the underlying electrode layer at a first end surface and a second end surface, and an upper plating layer on the lower plating layer. The underlying electrode layer is a thin film electrode including at least one selected from Ni, Cr, Cu, and Ti. The lower plating layer is a Cu plating layer including a lower layer region located closer to the multilayer body and an upper layer region located between the lower layer region and the upper plating layer, and the Cu plating layer in the lower layer region has a metal grain diameter smaller than that of the Cu plating layer located in the upper layer region.