H01G4/236

Metal insulator metal (MIM) structure and manufacturing method thereof

A MIM structure and manufacturing method thereof are provided. The MIM structure includes a substrate having a first surface and a metallization structure over the substrate. The metallization structure includes a bottom electrode layer, a dielectric layer on the bottom electrode layer, a ferroelectric layer on the dielectric layer, a top electrode layer on the ferroelectric layer, a first contact electrically coupled to the top electrode layer, and a second contact penetrating the dielectric layer and the ferroelectric layer, electrically coupled to the bottom electrode layer.

CAPACITOR
20230215645 · 2023-07-06 ·

A capacitor that includes an insulating substrate; a capacitance forming portion including a metal porous body, a dielectric film, and a conductive film; and a sealing portion that seals the capacitance forming portion. The capacitance forming portion is on a first main surface of the insulating substrate. A first external connection line including a first via conductor penetrating the insulating substrate from the first main surface side toward the second main surface side is connected to the metal porous body; and a second external connection line including a second via conductor penetrating the insulating substrate from the first main surface side toward the second main surface side is connected to the conductive film. When viewed in a normal direction of the first main surface, the first via conductor and the second via conductor are both in a region where the capacitance forming portion is disposed.

CAPACITOR
20230215645 · 2023-07-06 ·

A capacitor that includes an insulating substrate; a capacitance forming portion including a metal porous body, a dielectric film, and a conductive film; and a sealing portion that seals the capacitance forming portion. The capacitance forming portion is on a first main surface of the insulating substrate. A first external connection line including a first via conductor penetrating the insulating substrate from the first main surface side toward the second main surface side is connected to the metal porous body; and a second external connection line including a second via conductor penetrating the insulating substrate from the first main surface side toward the second main surface side is connected to the conductive film. When viewed in a normal direction of the first main surface, the first via conductor and the second via conductor are both in a region where the capacitance forming portion is disposed.

Capacitor bank structure and semiconductor package structure

A capacitor bank structure includes a plurality of capacitors, a protection material, a first dielectric layer and a plurality of first pillars. The capacitors are disposed side by side. Each of the capacitors has a first surface and a second surface opposite to the first surface, and includes a plurality of first electrodes and a plurality of second electrodes. The first electrodes are disposed adjacent to the first surface for external connection, and the second electrodes are disposed adjacent to the second surface for external connection. The protection material covers the capacitors, sidewalls of the first electrodes and sidewalls of the second electrodes, and has a first surface corresponding to the first surface of the capacitor and a second surface corresponding to the second surface of the capacitor. The first dielectric layer is disposed on the first surface of the protection material, and defines a plurality of openings to expose the first electrodes. The first pillars are disposed in the openings of the first dielectric layer and protrude from the first dielectric layer.

ECA oxide-resistant connection to a hermetic seal ferrule for an active implantable medical device

A hermetically sealed feedthrough assembly for an active implantable medical device having an oxide-resistant electrical attachment for connection to an EMI filter, an EMI filter circuit board, an AIMD circuit board, or AIMD electronics. The oxide-resistant electrical attachment, including an oxide-resistant sputter layer 165 is disposed on the device side surface of the hermetic seal ferrule over which an ECA stripe is provided. The ECA stripe may comprise one of a thermal-setting electrically conductive adhesive, an electrically conductive polymer, an electrically conductive epoxy, an electrically conductive silicone, an electrically conductive polyimide, or a thermal-setting electrically conductive polyimide, such as those manufactured by Ablestick Corporation. The oxide-free electrical attachment between the ECA stripe and the filter or AIMD circuits may comprise one of gold, platinum, palladium, silver, iridium, rhenium, rhodium, tantalum, tungsten, niobium, zirconium, vanadium, and combinations or alloys thereof.

ECA oxide-resistant connection to a hermetic seal ferrule for an active implantable medical device

A hermetically sealed feedthrough assembly for an active implantable medical device having an oxide-resistant electrical attachment for connection to an EMI filter, an EMI filter circuit board, an AIMD circuit board, or AIMD electronics. The oxide-resistant electrical attachment, including an oxide-resistant sputter layer 165 is disposed on the device side surface of the hermetic seal ferrule over which an ECA stripe is provided. The ECA stripe may comprise one of a thermal-setting electrically conductive adhesive, an electrically conductive polymer, an electrically conductive epoxy, an electrically conductive silicone, an electrically conductive polyimide, or a thermal-setting electrically conductive polyimide, such as those manufactured by Ablestick Corporation. The oxide-free electrical attachment between the ECA stripe and the filter or AIMD circuits may comprise one of gold, platinum, palladium, silver, iridium, rhenium, rhodium, tantalum, tungsten, niobium, zirconium, vanadium, and combinations or alloys thereof.

APPARATUS AND METHOD TO INTEGRATE THREE-DIMENSIONAL PASSIVE COMPONENTS BETWEEN DIES

Apparatus and methods are disclosed. In one example, a semiconductor package includes a first die that has a first surface and a first electrical lead at or near the first surface. The semiconductor package also includes a substrate that has a second surface and is coupled to the first die at a first interface. The substrate also includes a first electrode at or near the second surface and at least a first portion of an integrated passive device that is coupled to the first electrode. The first electrode is aligned with and coupled to the first electrical lead across the first interface.

Multilayer device and method for producing a multilayer device
11532437 · 2022-12-20 · ·

A multilayer device and a method for producing a multilayer device are disclosed. In an embodiment a multilayer device includes a main body having at least two external electrodes, at least one first internal electrode; at least one second internal electrode, wherein each internal electrode is electrically conductively connected to an external electrode, a plurality of ceramic layers, wherein the ceramic layers comprise the internal electrodes and at least one dielectric layer, wherein, viewed along a stack direction of the ceramic layers, the dielectric layer being arranged between the internal electrodes, and wherein the dielectric layer is printed onto at least one sub-region of one of the ceramic layers.

Multilayer device and method for producing a multilayer device
11532437 · 2022-12-20 · ·

A multilayer device and a method for producing a multilayer device are disclosed. In an embodiment a multilayer device includes a main body having at least two external electrodes, at least one first internal electrode; at least one second internal electrode, wherein each internal electrode is electrically conductively connected to an external electrode, a plurality of ceramic layers, wherein the ceramic layers comprise the internal electrodes and at least one dielectric layer, wherein, viewed along a stack direction of the ceramic layers, the dielectric layer being arranged between the internal electrodes, and wherein the dielectric layer is printed onto at least one sub-region of one of the ceramic layers.

Filtered feedthrough assembly for use in implantable medical device
11528004 · 2022-12-13 · ·

An implantable pulse generator including a header, a can, and a filtered feedthrough assembly. The header including lead connector blocks. The can coupled to the header and including a wall and an electronic substrate housed within the wall. The filtered feedthrough assembly including a flange mounted to the can and having a feedthrough port, a plurality of feedthrough wires extending through the feedthrough port, and an insulator brazed to the feedthrough port of the flange. The filtered feedthrough assembly further including a capacitor having the plurality of feedthrough wires extending there through, an insulating washer positioned between and abutting the insulator and the capacitor at least in the area of the braze joint such that the capacitor and the braze joint are non-conductive, and an electrically conductive material adhered to the capacitor and the flange for grounding of the capacitor.