A positioning jig assembly includes a positioning main body with holes into which electronic component bodies are respectively press-fit, a first and a second guide bodies disposed to be superimposed on the positioning main body in a planar view. First through-holes are formed in the first guide body. Second through-holes formed in the second guide body guide the electronic component main bodies to the first through-holes. The first through-holes provisionally position the electronic component main bodies. When height in the first direction of the electronic component main bodies is represented as H, lengths of the first through-hole and the second through-hole are respectively represented as L1 and L2, and depth of the hole is represented as D, L1<H<D+L1+L2 and D<H hold.

A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.

A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.

An electronic component includes an electronic component element and a barrier film. The electronic component element has external electrodes at both ends thereof. The barrier film covers at least a part of a periphery of the electronic component element. The barrier film includes an insulating film having electrical insulating property and a clay layer containing clay.

An electronic component includes an electronic component element and a barrier film. The electronic component element has external electrodes at both ends thereof. The barrier film covers at least a part of a periphery of the electronic component element. The barrier film includes an insulating film having electrical insulating property and a clay layer containing clay.

A multilayer electronic component includes: a body and an external electrode disposed on the body, wherein the external electrode includes a conductive resin layer containing a bisphenol A-based resin and a biphenyl-based resin with a specific mixing ratio (e.g., a ratio of a content of the biphenyl-based resin with respect to a total content is 10 wt % or more and 50 wt % or less). Such a resin mixing ratio between the bisphenol A-based resin and the biphenyl-based resin can lead to 0.337≤2*C/A≤0.367 or 0.048≤B/A≤0.14, with an aromatic ring peak intensity (A), a carbonyl peak intensity (B), and an alcohol peak intensity (C) in a Fourier transform infrared spectroscopy (FT-IR) analysis. The multilayer electronic component showing such peak intensity characteristics can suppress oxidation of a conductive resin layer while also securing excellent adhesive strength of the conductive resin layer.

A multilayer electronic component includes: a body including dielectric layers and internal electrodes alternately disposed with respective dielectric layers interposed therebetween; a first external electrode including a first connection portion, and first and second band portions extending from the first connection portion; a second external electrode including a second connection portion, and second and fourth band portions extending from the second connection portion; an insulating layer disposed to extend to a portion on the first and second connection portions; a first plating layer disposed on the first band portion and disposed to extend to be in contact with the insulating layer; and a second plating layer disposed on the second band portion and disposed to extend to be in contact with the insulating layer. An average thickness of the first or second plating layer is smaller than an average thickness of the insulating layer.

According to one embodiment, a capacitor includes a conductive substrate, a conductive layer, a dielectric layer, and first and second external electrodes. The conductive substrate has a first main surface provided with recess(s), a second main surface, and an end face extending between edges of the first and second main surfaces. The conductive layer covers the first main surface and side walls and bottom surfaces of the recess(s). The dielectric layer is interposed between the conductive substrate and the conductive layer. The first external electrode includes a first electrode portion facing the end face and is electrically connected to the conductive layer. The second external electrode includes a second electrode portion facing the end face and is electrically connected to the conductive substrate.

A multilayer electronic component includes: a body having first and second surfaces opposing each other in a first direction and third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction; a first external electrode including a first connection portion, disposed on the third surface, and a first band portion extending from the first connection portion onto a portion of the first surface; a second external electrode including a second connection portion, disposed on the fourth surface, and a second band portion extending from the second connection portion onto a portion of the first surface; an insulating layer disposed on the second surface to extend to portions of the first and second connection portions; a first plating layer disposed on the first band portion; and a second plating layer disposed on the second band portion. The insulating layer includes a polymer resin.

A multilayer electronic component includes a body including a dielectric layer and first and second internal electrodes alternately disposed with the dielectric layer interposed therebetween, a first external electrode disposed on the body and connected to the first internal electrode, and a second external electrode disposed on the body and connected to the second internal electrode, wherein the first and second external electrodes include a first electrode layer disposed on the body and including one or more of copper (Cu), nickel (Ni), and alloys thereof and a second electrode layer disposed on the first electrode layer, including silver (Ag) and further including one or more of palladium (Pd), platinum (Pt), and gold (Au), wherein the first electrode layer does not include glass and an average thickness of the first electrode layer is 1 μm or more and 10 μm or less.