A film capacitor that includes a resin layer which has a first surface and a second surface and in which there are particles on at least one of the first surface and the second surface; and a metal layer on the first surface of the resin layer, wherein there are more particles in number on the at least one of the first surface and the second surface of the resin layer than inside the resin layer.

Systems and methods for calibrating a low-power voltage transformer (LPVT). Systems include a capacitive voltage divider and a variable capacitance device connected to the capacitive voltage divider. A parameter of the variable capacitance device is adjusted to minimize the ratio error of the LPVT. Methods include connecting a variable capacitance device to a capacitive voltage divider of the LPVT system, measuring a ratio error of the LPVT system based on an output of the variable capacitance device, and adjusting a parameter of the variable capacitance device.

A parallel plate capacitor including a cathode core that further includes a pair of parallel electrodes and a dielectric material layer positioned between the pair of parallel electrodes. The capacitor also includes a dielectric liquid medium, where the cathode core is at least partially submerged in the dielectric liquid medium.

A multilayer capacitor include dielectric layers stacked in a direction perpendicular to a mounting surface of a capacitor body, and internal electrodes and an equivalent series inductance (ESL) control pattern formed on upper and lower portions of the dielectric layers, respectively. The internal electrodes have an area larger than that of the ESL control pattern, and the ESL control pattern is exposed to a mounting surface of a capacitor body.

The present invention is directed to a multilayer ceramic capacitor comprising a first external terminal disposed along a first end, a second external terminal disposed along a second end that is opposite the first end, and an active electrode region containing alternating dielectric layers and active electrode layers. At least one of the electrode layers comprises a first electrode and a second electrode. The first electrode is electrically connected with the first external terminal and has a first electrode arm comprising a main portion and a step portion. The main portion has a lateral edge extending from the first end of the multilayer capacitor and the step portion has a lateral edge offset from the lateral edge of the main portion. The second electrode is electrically connected with the second external terminal.

An electrode element (1) for an energy storage unit (200), such as a capacitor, has an electrode body (100) made of an active electrode material (E), wherein the electrode body (100) includes one or more of: at least one cavity (110) on its surface or in its interior; at least one partial volume (120) of lower density; and/or a surface coating (D) covering at least a portion of the surface of the electrode body (100), such that the surface area covered by the surface coating (D) remains unwetted when in contact with an electrolyte. Energy storage units (200) incorporating the electrode element (1) are particularly suitable for use in implantable electrotherapeutic devices.

A thin film capacitor includes a lower electrode layer, an upper electrode layer, and a dielectric substance layer provided between the lower electrode layer and the upper electrode layer. A dielectric patch member formed of a dielectric material is formed on a surface of the dielectric substance layer on an upper electrode layer side, a cross-sectional structure of the dielectric patch member has a taper angle of 1 to 25 degrees in a cross section perpendicular to the dielectric substance layer, the taper angle being an angle formed by (1) a tangential line tangent to an end portion of the dielectric patch member at a position that is 50% of a maximum height of the dielectric patch member and (2) a line being an interface between the dielectric substance layer and the upper electrode layer, and an area of the dielectric patch member is 100 to 900000 μm.sup.2.

A thin film capacitor includes a lower electrode layer, an upper electrode layer, and a dielectric substance layer provided between the lower electrode layer and the upper electrode layer. A dielectric patch member formed of a dielectric material is formed on a surface of the dielectric substance layer on an upper electrode layer side, a cross-sectional structure of the dielectric patch member has a taper angle of 1 to 25 degrees in a cross section perpendicular to the dielectric substance layer, the taper angle being an angle formed by (1) a tangential line tangent to an end portion of the dielectric patch member at a position that is 50% of a maximum height of the dielectric patch member and (2) a line being an interface between the dielectric substance layer and the upper electrode layer, and an area of the dielectric patch member is 100 to 900000 μm.sup.2.

A film capacitor that includes a wound body having a dielectric film and a metal layer. When a film face positioned at an average height in the thickness direction is defined in an area range of 100 μm by 140 μm of the first main surface of the dielectric film, an area ratio of a region having a height higher than the film face by 0.05 μm or more and less than 0.20 μm is 6.04% or less, an area ratio of a region having a height higher than the film face by 0.20 μm or more and less than 2.50 μm is 0.0998% to 1.13%, and an area ratio of a region having a height higher than the film face by 2.50 μm or more is 0.100% or less.

A composite electronic component includes a composite body including a multilayer ceramic capacitor and a ceramic chip coupled to each other. The multilayer ceramic capacitor includes a first ceramic body and first and second external electrodes, and the ceramic chip is disposed below the multilayer ceramic capacitor and includes a second ceramic body having first and second terminal electrodes. The multilayer ceramic capacitor and the ceramic chip are coupled by solder disposed between the first and second external electrodes and the first and second terminal electrodes, and each angle (θ) defined by inner side surfaces of the solder, respectively disposed on inner ends of bent portions of the first and second terminal electrodes disposed on an upper surface of the second ceramic body, and an upper plane of the second ceramic body of the ceramic chip satisfies 45 degrees or less.