High voltage metal insulator metal capacitors are described. In an example, a capacitor includes a first electrode plate, and a first capacitor dielectric on the first electrode plate. A second electrode plate is on the first capacitor dielectric and is over and parallel with the first electrode plate, and a second capacitor dielectric is on the second electrode plate. A third electrode plate is on the second capacitor dielectric and is over and parallel with the second electrode plate, and a third capacitor dielectric is on the third electrode plate. A fourth electrode plate is on the third capacitor dielectric and is over and parallel with the third electrode plate. In another example, a capacitor includes a first electrode, a capacitor dielectric on the first electrode, and a second electrode on the capacitor dielectric. The capacitor dielectric includes a plurality of alternating first dielectric layers and second dielectric layers.

A dielectric film for a film capacitor includes (A) a thermoplastic resin and (B) a metal diketone complex.

A dielectric film for a film capacitor includes (A) a thermoplastic resin and (B) a metal diketone complex.

A microelectronic device includes a semiconductor substrate and a high voltage isolation capacitor over the substrate. The capacitor includes a bottom capacitor plate over the substrate. Dielectric layers are formed above the bottom capacitor plate, including a top dielectric layer. A high dielectric layer on the top dielectric layer includes at least a first sublayer having a first dielectric constant that is higher than a dielectric constant of the top dielectric layer. A top capacitor plate is formed on the high dielectric layer over the bottom capacitor plate. An electric field abatement structure surrounds the top capacitor plate. The electric field abatement structure includes a shelf of the high dielectric layer extending outward from a lower corner of the bottom capacitor plate at least 14 microns, and an isolation break in the high dielectric layer past the shelf, in which the first sublayer is removed from the isolation break.

An integrated energy storage component that includes a substrate supporting a contoured layer having a region with a contoured surface such as elongated pores. A stack structure is provided conformally over the contoured surface of this region. The stack is a single or repeated instance of MOIM layers, or MIOM layers, the M layers being metal layers, or a quasi-metal such as TiN, the O layers being oxide layers containing ions, and the I layer being an ionic dielectric. The regions having a contoured surface may be formed of porous anodized alumina.

Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The lower electrode layer includes a first metal layer positioned on a side facing the dielectric layer and a second metal layer positioned on a side facing away from the dielectric layer. The first metal layer has a first surface positioned on a side facing the second metal layer and a second surface positioned on a side facing the dielectric layer. The first surface has a surface roughness higher than that of the second surface. The second metal layer reflects a surface property of the first surface.

Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The lower electrode layer includes a first metal layer positioned on a side facing the dielectric layer and a second metal layer positioned on a side facing away from the dielectric layer. The first metal layer has a first surface positioned on a side facing the second metal layer and a second surface positioned on a side facing the dielectric layer. The first surface has a surface roughness higher than that of the second surface. The second metal layer reflects a surface property of the first surface.

A capacitor structure, a method for manufacturing a capacitor structure and a method for operating a capacitor structure are provided. The capacitor structure includes a first electrode and a second electrode; a dielectric layer between the first electrode and the second electrode; and an oxygen donor layer between the dielectric layer and the first electrode. An oxygen concentration of the oxygen donor layer increases along a thickness direction from a first surface proximal to the dielectric layer to a second surface proximal to the first electrode.

A trench capacitor manufacturing method is provided. The method includes forming a deep trench in a wafer, forming a trench capacitor structure including a plurality of dielectric films and a plurality of conductive layers in the deep trench; determining if the wafer has a tensile stress based on the forming of the trench capacitor structure; performing a high temperature heat treatment to the trench capacitor structure to change a form of the wafer to a direction that offsets the tensile stress; forming an inter-layer insulating film on the trench capacitor structure; and forming a metal interconnect on the inter-layer insulating film.

A chip part is provided that includes a substrate in which an element region and an electrode region are set, an insulating film (a first insulating film and a second insulating film) which is formed on the substrate and which selectively includes an internal concave/convex structure in the electrode region on a surface, a first connection electrode and a second connection electrode which include, at a bottom portion, an anchor portion entering the concave portion of the internal concave/convex structure and which include an external concave/convex structure on a surface on the opposite side and a circuit element which is disposed in the element region and which is electrically connected to the first connection electrode and the second connection electrode.