Patent classifications
H01H2059/009
Electrostatic protection device and manufacturing method thereof and array substrate
An electrostatic protection device includes: a first conductive layer, a second conductive layer and a polarization film layer, in which the polarization film layer is disposed between the first conductive layer and the second conductive layer and formed of a piezoelectric material which is capable of deforming when applied with electricity; a conductive cantilever, disposed on the second conductive layer and including a free end; and a charge diffusion layer, disposed at a side of the conductive cantilever away from the polarization film layer, electrically connected with the first conductive layer and spaced apart from the conductive cantilever, in which upon a voltage difference between the first conductive layer and the second conductive layer reaching a predetermined value, the polarization film layer deforms to allow the conductive cantilever to connect with the charge diffusion layer.
Electrostatic Protection Device and Manufacturing Method Thereof and Array Substrate
An electrostatic protection device (10) includes: a first conductive layer (110), a second conductive layer (140) and a polarization film layer (130), in which the polarization film layer (130) is disposed between the first conductive layer (110) and the second conductive layer (140) and formed of a piezoelectric material which is capable of deforming when applied with electricity; a conductive cantilever (150), disposed on the second conductive layer (140) and including a free end (152); and a charge diffusion layer (170), disposed at a side of the conductive cantilever (150) away from the polarization film layer (130), electrically connected with the first conductive layer (110) and spaced apart from the conductive cantilever (150), in which upon a voltage difference between the first conductive layer (110) and the second conductive layer (140) reaching a predetermined value, the polarization film layer (130) deforms to allow the conductive cantilever (150) to connect with the charge diffusion layer (170). The device provides the conductive cantilever (150) which is in a suspended state in a case where the voltage difference between the first conductive layer (110) and the second conductive layer (140) does not reach the predetermined value, so the first conductive layer (110) and the second conductive layer (140) are disconnected so that the load of the first conductive layer (110) and the second conductive layer (140) are prevented from being influenced.
Method to create a reduced stiffness microstructure
Methods are described to create a reduced stiffness microstructure (RSM). A RSM is made by forming a first buckled membrane along a first buckling direction and forming a second buckled membrane along a second buckling direction. The second buckling direction is opposite to the first buckling direction and the first buckled membrane is in contact with the second buckled membrane over a contact area. Within an operating zone, a stiffness of the reduced stiffness microstructure during contact is less than an absolute value of a stiffness of at least one of the first buckled membrane, before contact, and the second buckled membrane, before contact, when the contact area translates along either one of the first buckling direction and the second buckling direction. In the operating zone the stiffness can approach or equal zero.
MICROFABRICATED DEVICE WITH PIEZOELECTRIC SUBSTRATE AND METHOD OF MANUFACTURE
Systems and methods for forming an electrostatic MEMS plate switch include forming a deformable plate on a first substrate, forming the electrical contacts on a second piezoelectric substrate, and coupling the two substrates using a hermetic seal. The deformable plate may have at least one shunt bar located at a nodal line of a vibrational mode of the deformable plate, so that the shunt bar remains relatively stationary when the plate is vibrating in that vibrational mode. The second piezoelectric substrate may include lithium tantalate (LiTaO3) or lithium niobate (LiNiO3) or lead zirconate titanate (Pb[Zr(x)Ti(1x)]O3), or integrated circuits formed thereon.