The present disclosure relates to plasma dicing of wafer. More specifically, the present disclosure is directed to frame masks and methods for plasma dicing wafers utilizing frame masks. The frame mask includes a mask frame, wherein the mask frame includes a top ring mask support and a side ring mask support. A plurality of mask segments suspended from the top ring mask support by segment supports, the mask segments are configured to define dicing channels on a blank wafer. The frame mask is configured to removably sit onto a frame lift assembly in a plasma chamber of a plasma dicing tool, when fitted onto the frame lift assembly, the mask segments are disposed above a wafer on a wafer ring frame for plasma dicing. The mask frame is configured to enable flow of plasma therethrough to the wafer to etch the wafer to form dicing channels defined by the mask segments.

Systems and methods for controlling directionality of ion flux at an edge region within a plasma chamber are described. One of the systems includes a radio frequency (RF) generator that is configured to generate an RF signal, an impedance matching circuit coupled to the RF generator for receiving the RF signal to generate a modified RF signal, and a plasma chamber. The plasma chamber includes an edge ring and a coupling ring located below the edge ring and coupled to the first impedance matching circuit to receive the modified RF signal. The coupling ring includes an electrode that generates a capacitance between the electrode and the edge ring to control the directionality of the ion flux upon receiving the modified RF signal.

Generators and methods for igniting a plasma in a plasma chamber are disclosed. The generator includes an ignition profile generator that includes a data interface configured to receive a voltage value and a time value for each of N data points and an ignition data generator configured to create an ignition profile from the N data points. The generator also includes an ignition profile datastore to store the ignition profile and a waveform generator configured to apply a waveform with the ignition profile to an output of the generator.

An embodiment includes a support unit, substrate treating apparatus and substrate treating method. The substrate treating apparatus comprises: a process chamber having a treatment space inside thereof; a support unit for supporting a substrate inside of the process chamber; and a gas supply unit for supplying the treatment gas into the treatment space, wherein the support unit comprises: an electrode layer of a metal material to which a high frequency electric power can be applied; a ground line having one end connected to the electrode layer and the other end grounded; and a switch provided on the ground line.

A system and method for plasma enhanced deposition processes. An exemplary semiconductor manufacturing system includes a susceptor configured to hold a semiconductor wafer and a sector disposed above the susceptor. The sector includes a first plate and an overlying second plate, operable to form a plasma there between. The first plate includes a plurality of holes extending through the first plate, which vary in at least one of diameter and density from a first region of the first plate to a second region of the first plate.

A method of plasma etching one or more features in a silicon substrate includes performing a main etch using a cyclical etch process in which a deposition step and an etch step are alternately repeated, and performing an over etch to complete the plasma etching of the features. The over etch includes one or more etch steps of a first kind and one or more etch steps of a second kind, each of the etch steps of the first and second kind include etching by ion bombardment of the silicon substrate. The ion bombardment during the one or more etch steps of the second kind has an inward inclination with respect to ion bombardment during the one or more etch steps of the first kind.

A spatially selective surface functionalization device configured to generate a pattern of micro plasmas and functionalize a substrate surface may include: a pattern management system, a patterning head, and a gas delivery system, wherein the gas delivery system provides a primed gas mixture for forming a plasma between the patterning head and a target substrate below the patterning head. A patterning head may generate a distribution of micro plasmas from individual directed beams of electrons with spatial separation. A pattern management system may store and manipulate information about a pattern of surface functionalization and generate instructions for regulating a distribution of micro plasmas that functionalize a substrate surface.

A plasma reactor for generating a plasma for use in depositing a thin film on a large area wafer, such as in the manufacturing of solar cells. A plasma electrode unit in the plasma reactor is divided into a plurality of discrete electrodes, and RF electric power is sequentially applied to the divided plasma electrodes in accordance with a predefined sequence of temporal intervals as controlled by a sequence control unit. The sequential application of RF power across the divided plasma electrode unit resolves a standing wave problem in the plasma applied over a large area corresponding to a large area wafer.

Disclosed embodiments apply electron beams to substrates for microelectronic workpieces to improve plasma etch and deposition processes. The electron beams are generated and directed to substrate surfaces using DC (direct current) biasing, RF (radio frequency) plasma sources, and/or other electron beam generation and control techniques. For certain embodiments, DC-biased RF plasma sources, such as DC superposition (DCS) or hybrid DC-RF sources, are used to provide controllable electron beams on surfaces opposite a DC-biased electrode. For certain further embodiments, the DC-biased electrode is pulsed. Further, electron beams can also be generated through electron beam extraction from external and/or non-ambipolar sources. The disclosed techniques can also be used with additional electron beam sources and/or additional etch or deposition processes.

The present application relates to a scanning probe microscope comprising a probe arrangement for analyzing at least one defect of a photolithographic mask or of a wafer, wherein the scanning probe microscope comprises: (a) at least one first probe embodied to analyze the at least one defect; (b) means for producing at least one mark, by use of which the position of the at least one defect is indicated on the mask or on the wafer; and (c) wherein the mark is embodied in such a way that it may be detected by a scanning particle beam microscope.