To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period.

To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period.

A thin film transistor, a method for fabricating the same, an array substrate, a display panel, and a display device are provided. The thin film transistor includes a substrate, and an active layer on the substrate, wherein the active layer includes a poly-silicon layer and has a channel region and two electrode connection regions respectively on two sides of the channel region, and the channel region includes a plurality of lightly drain doping segments, which are spaced apart along from one of the electrode connection regions to the other electrode connection region, and channel segments located between the lightly drain doping segments.

A display device includes: a flexible substrate; a semiconductor layer on the flexible substrate; a passivation layer on the semiconductor layer; an alignment member layer on the passivation, the alignment member layer including a first alignment member and a second alignment member in a same layer; a first insulation layer on the alignment member layer and the passivation layer; a gate electrode on the first insulation layer; a second insulation layer on the first insulation layer and the gate electrode; and a source electrode and a drain electrode on the second insulation layer and spaced apart from each other, wherein the first alignment member and the second alignment member are spaced apart from each other with the gate electrode therebetween.

A transistor device disposed on a substrate and including a semiconductor layer, a first gate, a second gate, and two source drain electrodes is provided. The semiconductor layer is disposed on the substrate and has a channel region, two lightly-doped regions, and two source drain regions. Each of the two lightly-doped regions has a first boundary adjoined to the channel region and a second boundary adjoined to one of the two source drain regions. The first gate is extended over the channel region of the semiconductor layer, wherein an edge of the first gate is aligned with the first boundary. The second gate is stacked on the first gate and is in contact with the first gate, wherein in a thickness direction, the second gate is overlapped with the two lightly-doped regions. The two source drain electrodes are respectively in contact with the two source drain regions.

An array substrate, a manufacturing method for same, and a display panel are provided. In the manufacturing method, ion doping is performed once on an active layer, and the doped active layer forms a first doped region and a second doped region through a predetermined process. On the basis of a current process and without increasing the quantity of masks, a PMOS LDD structure is added to an AMOLED. This effectively reduces a period of a panel array manufacturing process and reduces manufacturing costs.

A transistor device disposed on a substrate and including a semiconductor layer, a first gate, a second gate, and two source drain electrodes is provided. The semiconductor layer is disposed on the substrate and has a channel region, two lightly-doped regions, and two source drain regions. Each of the two lightly-doped regions has a first boundary adjoined to the channel region and a second boundary adjoined to one of the two source drain regions. The first gate is extended over the channel region of the semiconductor layer, wherein an edge of the first gate is aligned with the first boundary. The second gate is stacked on the first gate and is in contact with the first gate, wherein in a thickness direction, the second gate is overlapped with the two lightly-doped regions. The two source drain electrodes are respectively in contact with the two source drain regions.

The present application discloses a method of fabricating a thin film transistor, including forming a semiconductor layer having a pattern corresponding to that of the active layer on a base substrate; forming a first photoresist layer on a side of the semiconductor layer distal to the base substrate; the first photoresist layer being in an area corresponding to the channel region, the second doped region, and the fourth doped region; doping a region of the semiconductor layer corresponding to the first doped region and the third doped region using the first photoresist layer as a mask plate; forming a second photoresist layer by removing a portion of the first photoresist layer to expose an initial portion of the semiconductor layer corresponding to at least a portion of the second doped region and at least a portion of the fourth doped region; and doping the initial portion of the semiconductor layer using the second photoresist layer as a mask plate.

A polysilicon thin film transistor, a manufacturing method thereof, an array substrate involve display technology field, and can repair the boundary defect and the defect state in polysilicon, suppress the hot carrier effect and make the characteristics of TFTs more stable. The polysilicon thin film transistor includes a gate electrode, a source electrode, a drain electrode and an active layer, the active layer comprises at least a channel area, first doped regions, second doped regions and heavily doped regions, and the first doped regions are disposed on two sides of the channel area, the second doped regions are disposed on sides of the first doped regions away from the channel area; the heavily doped regions are disposed on sides of the second doped regions opposed to the first doped regions; and dosage of ions in the heavily doped regions lies between that in the first doped regions and that in the second doped regions.

The embodiments of the present invention disclose a low temperature poly-silicon (LTPS) transistor array substrate and a method of fabricating the same, and a display device. The LTPS transistor array substrate comprises a substrate; a poly-silicon semiconductor active region provided on the substrate; a gate insulated from the poly-silicon semiconductor active region; and a dielectric spacer region provided on a side wall of the gate, wherein a portion of the poly-silicon semiconductor active region corresponding to the dielectric spacer region comprises a buffer region, and the dielectric spacer region surrounds the side wall of the gate and covers the buffer region.