Apparatus and methods to process one or more wafers are described. The apparatus comprises a chamber defining an upper interior region and a lower interior region. A heater assembly is on the bottom of the chamber body in the lower interior region and defines a process region. A wafer cassette assembly is inside the heater assembly and a motor is configured to move the wafer cassette assembly from the lower process region inside the heater assembly to the upper interior region.

Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material.

An ESD protection composite structure includes a link layer, a progressive layer, and a composite layer. The link layer is used for disposing the ESD protection composite structure on a substrate, wherein a material of the link layer includes a metal material. The progressive layer is disposed on the link layer, wherein the material of the progressive layer includes a non-stoichiometric metal oxide material, and an oxygen concentration in the non-stoichiometric metal oxide material is increased gradually away from the substrate in a thickness direction of the progressive layer. The composite layer is disposed on the progressive layer, wherein the composite layer includes a stoichiometric metal oxide material and a non-stoichiometric metal oxide material, and a ratio of the non-stoichiometric metal oxide material and the stoichiometric metal oxide material in the composite layer may make a sheet resistance value of the composite layer 110.sup.7 /sq to 110.sup.8 /sq.

A substrate support element for a support rack for thermal treatment of a substrate is provided. The substrate support element includes a support surface for the substrate. The substrate support element is a composite body that includes a first composite component and a second composite component, whereby the first composite component has a thermal conductivity in the range of 0.5 to 40 W/(m.Math.K) and the second composite component has a thermal conductivity in the range of 70 to 450 W/(m.Math.K).

The present invention provides a stopper for a substrate cassette and a substrate cassette assembly, belonging to the technical field of manufacturing of display devices, which can solve the problem that an existing substrate cassette easily damages a substrate. The stopper for the substrate cassette of the present invention is strip-shaped, and arranged, in a length direction, on an inner side of a mullion of the substrate cassette; the stopper has a contact surface configured to contact the mullion of the substrate cassette and an exposed surface opposite to the contact surface, and the exposed surface, at least on a side facing the outside of the substrate cassette, is a convex cambered surface.

Embodiments disclosed herein include an electrostatic chuck (ESC). In an embodiment, the ESC comprises a substrate with a first surface, where the first surface has a first surface roughness. The ESC may further comprise a plurality of mesas extending up from the first surface. In an embodiment, the plurality of mesas each include a second surface, where the second surface has a second surface roughness. In an embodiment the first surface roughness and the second surface roughness both have an average surface roughness Ra of approximately 0.3 ?m or lower.

An apparatus for thermal treatment of a substrate is provided. The apparatus has a heating device and a carrier provided with a support surface for the substrate. The apparatus permits a high substrate throughput. At least part of the carrier contains a composite material containing an amorphous matrix component and an additional component containing a semiconductor material, and a conductor path that is part of the heating device and made of an electrically conducting resistance material that generates heat when current passes through it is applied to a surface of the composite material.

A substrate boat for use in heat treatment of semiconductor wafers includes support rods and fingers for supporting a substrate in a horizontal orientation in process tools, e.g., furnaces. The substrate is supported in the substrate boat by groups of fingers lying in a common horizontal plane. The fingers contact the substrate at support locations on the back side of the substrate. The fingers have a plurality of different shapes and a substrate surface no contact region.

Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material.

Apparatus and methods to process one or more wafers are described. The apparatus comprises a chamber defining an upper interior region and a lower interior region. A heater assembly is on the bottom of the chamber body in the lower interior region and defines a process region. A wafer cassette assembly is inside the heater assembly and a motor is configured to move the wafer cassette assembly from the lower process region inside the heater assembly to the upper interior region.