Patent classifications
H01L2221/1047
SEMICONDUCTOR DEVICE WITH PLUG STRUCTURE
The present application discloses a semiconductor device. The semiconductor device includes a substrate; a plug structure including a bottom conductive layer positioned on the substrate, a middle conductive layer positioned on the bottom conductive layer, a top conductive layer positioned on the middle conductive layer, and an insulating covering layer covering a sidewall of the middle conductive layer and positioned between the bottom conductive layer and the top conductive layer; and a first dielectric layer positioned on the substrate and surrounding the plug structure. A width of the bottom conductive layer is greater than a width of the middle conductive layer. A width of the top conductive layer is greater than the width of the middle conductive layer.
Low Dielectric Constant Film and Preparation Method Thereof
Provided is a low dielectric constant film and a preparation method thereof, where epoxy alkanes, organosilicon compounds and fluorine-containing siloxane compounds are used as raw materials of the low dielectric constant film, and the low dielectric constant film is formed on a substrate surface by a plasma-enhanced chemical deposition method. Accordingly, a nanofilm with a low dielectric constant and excellent hydrophobicity is formed on the substrate surface.
CONFORMAL DEPOSITION OF SILICON CARBIDE FILMS USING HETEROGENEOUS PRECURSOR INTERACTION
A doped or undoped silicon carbide film can be deposited using a remote plasma chemical vapor deposition (CVD) technique. One or more silicon-containing precursors are provided to a reaction chamber. Radical species, such as hydrogen radical species, are provided in a substantially low energy state or ground state and interact with the one or more silicon-containing precursors to deposit the silicon carbide film. A co-reactant may be flowed with the one or more silicon-containing precursors, where the co-reactant can be a depositing additive or a non-depositing additive to increase step coverage of the silicon carbide film.
REMOTE PLASMA BASED DEPOSITION OF OXYGEN DOPED SILICON CARBIDE FILMS
Disclosed are methods and systems for providing oxygen doped silicon carbide. A layer of oxygen doped silicon carbide can be provided under process conditions that employ one or more silicon-containing precursors that have one or more silicon-hydrogen bonds and/or silicon-silicon bonds. The silicon-containing precursors may also have one or more silicon-oxygen bonds and/or silicon-carbon bonds. One or more radical species in a substantially low energy state can react with the silicon-containing precursors to form the oxygen doped silicon carbide film. The one or more radical species can be formed in a remote plasma source.
Method for fabricating semiconductor device with porous decoupling features
The present application discloses a method for fabricating the semiconductor device with the porous decoupling features. The method includes providing a substrate; integrally forming a first conductive line and a bottom contact on the substrate; integrally forming a first conductive line spacer on a sidewall of the first conductive line and a bottom contact spacer on a sidewall of the bottom contact; and forming a porous insulating layer between the first conductive line spacer and the bottom contact spacer.
Conformal deposition of silicon carbide films
Disclosed are methods and systems for providing silicon carbide films. A layer of silicon carbide can be provided under process conditions that employ one or more silicon-containing precursors that have one or more silicon-hydrogen bonds and/or silicon-silicon bonds. The silicon-containing precursors may also have one or more silicon-oxygen bonds and/or silicon-carbon bonds. One or more radical species in a substantially low energy state can react with the silicon-containing precursors to form the silicon carbide film. The one or more radical species can be formed in a remote plasma source.
ETCH DAMAGE AND ESL FREE DUAL DAMASCENE METAL INTERCONNECT
Some embodiments relate to a semiconductor device disposed on a semiconductor substrate. A dielectric structure is arranged over the semiconductor substrate. First and second metal vias are disposed in the dielectric structure and spaced laterally apart from one another. First and second metal lines are disposed in the dielectric structure and have nearest neighboring sidewalls that are spaced laterally apart from one another by a portion of the dielectric structure. The first and second metal lines contact upper portions of the first and second metal vias, respectively. First and second air gaps are disposed in the portion of the dielectric structure. The first and second air gaps are proximate to nearest neighboring sidewalls of the first and second metal lines, respectively.
Etch damage and ESL free dual damascene metal interconnect
A method of forming a dual damascene metal interconnect for a semiconductor device. The method includes forming a layer of low-k dielectric, forming vias through the low-k dielectric layer, depositing a sacrificial layer, forming trenches through the sacrificial layer, filling the vias and trenches with metal, removing the sacrificial layer, then depositing an extremely low-k dielectric layer to fill between the trenches. The method allows the formation of an extremely low-k dielectric layer for the second level of the dual damascene structure while avoiding damage to that layer by such processes as trench etching and trench metal deposition. The method has the additional advantage of avoiding an etch stop layer between the via level dielectric and the trench level dielectric.
Interconnect structure and method
A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for surrounding dielectric layers. The insert layer may be applied between two dielectric layers. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
Conductive structure in semiconductor structure and method for forming the same
A method for manufacturing a semiconductor structure is provided. The method for manufacturing a semiconductor structure includes forming an organosilicon layer over a substrate and etching the organosilicon layer to have a trench. The method for manufacturing a semiconductor structure further includes forming a conductive structure in the trench. In addition, the organosilicon layer is made of a material including Si—C bonding and Si—O bonding, and a ratio of an amount of the Si—C bonding to an amount of the Si—O bonding is greater than about 0.2.