A redistribution layer for an integrated circuit is made by forming a conductive interconnection layer; forming a conductive body in electrical contract with the interconnection layer; and covering the conductive body with a first coating layer having a thickness less than 100 nm. The first coating layer is configured to provide a protection against oxidation and/or corrosion of the conductive body. To carry out an electrical test of the integrated circuit, a testing probe locally perforates the first coating layer until the conductive body is electrically contacted by the testing probe.

A method for fabricating a semiconductor die package includes: providing a semiconductor transistor die, the semiconductor transistor die having a first contact pad on a first lower main face and/or a second contact pad on an upper main face; fabricating a frontside electrical conductor onto the second contact pad and a backside electrical conductor onto the first contact pad; and applying an encapsulant covering the semiconductor die and at least a portion of the electrical conductor, wherein the frontside electrical conductor and/or the backside electrical conductor is fabricated by laser-assisted structuring of a metallic structure.

A display device comprises a first substrate including a first contact hole, a first barrier insulating layer disposed on the first substrate and including second contact holes overlapping the first contact hole, pad electrodes disposed on the first barrier insulating layer, at least a subset of the pad electrodes being disposed in the second contact holes, a display layer disposed on the pad electrodes, and a flexible film disposed below the first substrate and electrically connected to the pad electrodes through the first contact hole and the second contact holes, wherein the first substrate includes a substrate buffer portion overlapping the first contact hole and not-overlapping the second contact holes.

This disclosure is related to integrating optoelectronics microdevices into a system substrate for efficient and durable electrical bonding between two substrates at low temperature. 2D nanostructures and 3D scaffolds may create interlocking structures for improved bonding properties. Addition of nanoparticles into the structure creates high surface area for better conduction. Application of curing agents before or after alignment of micro devices and receiving substrates further assists with formation of strong bonds.

A semiconductor die package includes a semiconductor transistor die having a contact pad on an upper main face. The semiconductor die package also includes an electrical conductor disposed on the contact pad and fabricated by laser-assisted structuring of a metallic material, and an encapsulant covering the semiconductor die and at least a portion of the electrical conductor.

A semiconductor structure is provided. The semiconductor structure includes an interconnection structure, a first conductive pad, a second conductive pad, a conductive material and a conductive coil. The first and second conductive pads are disposed over and electrically connected to the interconnection structure individually. The conductive material is electrically isolated from the interconnection structure, wherein bottom surfaces of the conductive material, the first conductive pad and the second conductive pad are substantially aligned. The conductive coil is disposed in the interconnection structure and overlapped by the conductive material. A manufacturing method of a semiconductor structure is also provided.

The present invention relates to an optoelectronic device comprising: (a) a substrate comprising at least one first electrode, which at least one first electrode comprises a first electrode material, and at least one second electrode, which at least one second electrode comprises a second electrode material; and (b) a photoactive material disposed on the substrate, which photoactive material is in contact with the at least one first electrode and the at least one second electrode, wherein the substrate comprises: a layer of the first electrode material; and, disposed on the layer of the first electrode material, a layer of an insulating material, which layer of an insulating material partially covers the layer of the first electrode material; and, disposed on the layer of the insulating material, the second electrode material, and wherein the photoactive material comprises a crystalline compound, which crystalline compound comprises: one or more first cations selected from metal or metalloid cations; one or more second cations selected from Cs.sup.+′RB.sup.+, K.sup.+, NH.sup.4 + and organic cations; and one or more halide or chalcogenide anions. A substrate comprising a first and second electrode and processes are also described.

A light-emitting device includes: a light-emitting element; a coating member that covers the light-emitting element; and two external connection electrodes exposed form a first surface of the coating member. Each of the external connection electrodes includes an electrode buried in the coating member; and a metal layer formed on the electrode. A surface of each of the metal layers is exposed from the first surface of the coating member. The first surface of the coating member includes a plurality of grooves between the external connection electrodes.

A method for fabricating a semiconductor die package includes: providing a semiconductor transistor die, the semiconductor transistor die having a first contact pad on a first lower main face and/or a second contact pad on an upper main face; fabricating a frontside electrical conductor onto the second contact pad and a backside electrical conductor onto the first contact pad; and applying an encapsulant covering the semiconductor die and at least a portion of the electrical conductor, wherein the frontside electrical conductor and/or the backside electrical conductor is fabricated by laser-assisted structuring of a metallic structure.

A method of making a semiconductor device involves the steps of disposing a first semiconductor die over a substrate and disposing a beam homogenizer over the first semiconductor die. A beam from the beam homogenizer impacts the first semiconductor die. The method further includes the steps of determining a positional offset of the beam relative to the first semiconductor die in a number of pixels, using a first calibration equation to convert the number of pixels into a distance in millimeters, and moving the beam homogenizer the distance in millimeters to align the beam and first semiconductor die.