A semiconductor device includes a silicon substrate, a first layer, a second layer, a barrier metal, and a gate pad. The first layer is formed of an oxide film provided on an upper surface of the silicon substrate. The second layer is a layer at least selectively having a projecting and recessed part on an upper surface of the first layer, the projecting and recessed part having a projection and recess deeper than a projection and recess occurring when the layer is formed in a planar shape. The barrier metal is formed on an upper surface of the second layer according to a shape of the projecting and recessed part. The gate pad is in close contact with the silicon substrate via the barrier metal.

A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.

A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.

A semiconductor device includes a silicon substrate, a first layer, a second layer, a barrier metal, and a gate pad. The first layer is formed of an oxide film provided on an upper surface of the silicon substrate. The second layer is a layer at least selectively having a projecting and recessed part on an upper surface of the first layer, the projecting and recessed part having a projection and recess deeper than a projection and recess occurring when the layer is formed in a planar shape. The barrier metal is formed on an upper surface of the second layer according to a shape of the projecting and recessed part. The gate pad is in close contact with the silicon substrate via the barrier metal.

A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.

A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.

A method of manufacturing an electronic device may include: forming at least one electronic component in a substrate; forming a contact pad in electrical contact with the at least one electronic component; wherein forming the contact pad includes: forming a first layer over the substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface, wherein the second layer has a lower porosity than the first layer.

A method of manufacturing an electronic device may include: forming at least one electronic component in a substrate; forming a contact pad in electrical contact with the at least one electronic component; wherein forming the contact pad includes: forming a first layer over the substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface, wherein the second layer has a lower porosity than the first layer.