A discrete three-dimensional (3-D) processor comprises first and second dice. The first die comprises 3-D memory (3D-M) arrays, whereas the second die comprises logic circuits and at least an off-die peripheral-circuit component of the 3D-M array(s). Typical off-die peripheral-circuit component could be an address decoder, a sense amplifier, a programming circuit, a read-voltage generator, a write-voltage generator, a data buffer, or a portion thereof.

A discrete three-dimensional (3-D) processor comprises stacked first and second dice. The first die comprises three-dimensional memory (3D-M) arrays, whereas the second die comprises at least a portion of a logic/processing circuit and an off-die peripheral-circuit component of the 3D-M array(s). The preferred 3-D processor can be used to compute non-arithmetic function/model. In other applications, the preferred 3-D processor may also be a 3-D configurable computing array, a 3-D pattern processor, or a 3-D neuro-processor.

A semiconductor device has a substrate, a first circuit, a first inductor, a second circuit and a second inductor IND2. The substrate includes a first region and a second region, which are regions different from each other. The first circuit is formed on the first region. The first inductor is electrically connected with the first circuit. The second circuit is formed on the second regions. The second inductor is electrically connected with the second circuit and formed to face the first inductor. A penetrating portion is formed in the substrate. The penetrating portion is formed such that the penetrating portion surrounds one or both of the first circuit and the second circuit in plan view.

This method for producing a structure wherein base materials are bonded by atomic diffusion comprises: a step for applying a liquid resin on the base material; a step for smoothing the surface of the liquid resin by surface tension; a step for forming a resin layer by curing; a step for forming a metal thin film on the resin layer; a step for forming a metal thin film on the base material; and a step for bringing the metal thin film of the base material and the metal thin film of the base material into close contact with each other, thereby bonding the metal thin film of the resin layer and the metal thin film of the base material with each other by atomic diffusion.

Representative implementations of techniques and devices are used to reduce or prevent conductive material diffusion into insulating or dielectric material of bonded substrates. Misaligned conductive structures can come into direct contact with a dielectric portion of the substrates due to overlap, especially while employing direct bonding techniques. A barrier interface that can inhibit the diffusion is disposed generally between the conductive material and the dielectric at the overlap.

A discrete three-dimensional (3-D) processor comprises first and second dice. The first die comprises 3-D memory (3D-M) arrays, whereas the second die comprises logic circuits and at least an off-die peripheral-circuit component of the 3D-M array(s). Typical off-die peripheral-circuit component could be an address decoder, a sense amplifier, a programming circuit, a read-voltage generator, a write-voltage generator, a data buffer, or a portion thereof.

A semiconductor structure includes: a first substrate, with a first opening being provided on a surface of first substrate; and a first bonding structure positioned in the first opening. The first bonding structure includes a first metal layer and a second metal layer with a melting point lower than that of the first metal layer. The first metal layer includes a first surface in contact with a bottom surface of the first opening and a second surface opposite to the first surface, the second surface is provided with a first groove, an area, not occupied by the first metal layer and the first groove, of the first opening constitutes a second groove, the second metal layer is formed in the first groove and the second groove, and a surface, exposed from the second groove, of the second metal layer constitutes a bonding surface of the first bonding structure.

The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a first chip and a second chip. A first conductive connection wire of the first chip is connected to a first conductive contact pad, and a second conductive connection wire of the second chip is connected to a second conductive contact pad. In addition, the first conductive contact pad includes a first conductor group and a second conductor group, and the second conductive contact pad includes a third conductor group and a fourth conductor group.

A semiconductor structure is provided. The semiconductor structure includes a first substrate, and a first bonding structure and a first conductive via which are formed in the first substrate. The first bonding structure includes a first metal layer and a second metal layer with a melting point lower than a melting point of the first metal layer. The first metal layer includes a first surface and a second surface arranged opposite to each other. The first surface of the first metal layer is provided with a first groove, and the second metal layer is arranged in the first groove. The first conductive via is in contact with the second surface of the first metal layer. A projection of the first conductive via coincides with a projection of the first groove in a direction perpendicular to the first surface of the first metal layer.

The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a first chip and a second chip, where a first conductive connection wire of the first chip is connected to a first conductive contact pad, a second conductive connection wire of the second chip is connected to a second conductive contact pad, the first conductive contact pad includes a first conductor group and a first connection group, and the second conductive contact pad includes a second conductor group and a second connection group.