After finishing of the front side CMOS manufacturing process, the silicon wafer is permanently bonded with its front side onto a carrier wafer. The carrier wafer is a high resistivity silicon wafer or a wafer of a dielectric or of a ceramic material. The silicon substrate of the device wafer is thinned from the back side such that the remaining silicon thickness is only a few micrometers. In the area dedicated to a spiral inductor, the substrate material is entirely removed by a masked etching process and the resulting gap is filled with a dielectric material. A spiral inductor coil is formed on the backside of the wafer on top of the dielectric material. The inductor coil is connected to the CMOS circuits on the front side by through-silicon vias.

After finishing of the front side CMOS manufacturing process, the silicon wafer is permanently bonded with its front side onto a carrier wafer. The carrier wafer is a high resistivity silicon wafer or a wafer of a dielectric or of a ceramic material. The silicon substrate of the device wafer is thinned from the back side such that the remaining silicon thickness is only a few micrometers. In the area dedicated to a spiral inductor, the substrate material is entirely removed by a masked etching process and the resulting gap is filled with a dielectric material. A spiral inductor coil is formed on the backside of the wafer on top of the dielectric material. The inductor coil is connected to the CMOS circuits on the front side by through-silicon vias.

Disclosed herein is a method comprising: forming a first electrically conductive layer on a first surface of a substrate of semiconductor, wherein the first electrically conductive layer is in electrical contact with the semiconductor; bonding, at the first electrically conductive layer, a support wafer to the substrate of semiconductor; thinning the substrate of semiconductor.

Disclosed herein is a method comprising: forming a first electrically conductive layer on a first surface of a substrate of semiconductor, wherein the first electrically conductive layer is in electrical contact with the semiconductor; bonding, at the first electrically conductive layer, a support wafer to the substrate of semiconductor; thinning the substrate of semiconductor.

Microelectronic assemblies, related devices, and methods are disclosed herein. In some embodiments, a microelectronic assembly may include a die having a first surface and an opposing second surface; a capacitor having a surface, wherein the surface of the capacitor is coupled to the first surface of the die; and a conductive pillar coupled to the first surface of the die. In some embodiments, a microelectronic assembly may include a capacitor in a first dielectric layer; a conductive pillar in the first dielectric layer; a first die having a surface in the first dielectric layer; and a second die having a surface in a second dielectric layer, wherein the second dielectric layer is on the first dielectric layer, and wherein the surface of the second die is coupled to the capacitor, to the surface of the first die, and to the conductive pillar.

Microelectronic assemblies, related devices, and methods are disclosed herein. In some embodiments, a microelectronic assembly may include a die having a first surface and an opposing second surface; a capacitor having a surface, wherein the surface of the capacitor is coupled to the first surface of the die; and a conductive pillar coupled to the first surface of the die. In some embodiments, a microelectronic assembly may include a capacitor in a first dielectric layer; a conductive pillar in the first dielectric layer; a first die having a surface in the first dielectric layer; and a second die having a surface in a second dielectric layer, wherein the second dielectric layer is on the first dielectric layer, and wherein the surface of the second die is coupled to the capacitor, to the surface of the first die, and to the conductive pillar.

A flip chip circuit comprising: a semiconductor substrate; a power amplifier provided on the semiconductor substrate; and a metal pad configured to receive an electrically conductive bump for connecting the flip chip to external circuitry. At least a portion of the power amplifier is positioned directly between the metal pad and the semiconductor substrate.

A flip chip circuit comprising: a semiconductor substrate; a power amplifier provided on the semiconductor substrate; and a metal pad configured to receive an electrically conductive bump for connecting the flip chip to external circuitry. At least a portion of the power amplifier is positioned directly between the metal pad and the semiconductor substrate.

A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2˜150.

A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2˜150.